IP Library Assignment 024942/0386
Patent Assignment
Reel/Frame 024942/0386

Assignment of Assignor's Interest

Recorded: 2010-09-07 Pages: 4
Assignors
STEVENS, KENNETH S.
Executed: 2010-08-26
XU, YANG
Executed: 2010-08-26
Assignee
UTAH, UNIVERSITY OF
615 ARAPEEN DRIVE, SUITE 310, SALT LAKE CITY, UTAH, 84108
Covered Property (1)
Method and System for Synthesizing Relative Timing Constraints on an Integrated Circuit Design to Facilitate Timing Verification
Patent: 8,239,796 →
Application: 12/715,918 →
Publication: US 2011/0161902
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Mar 2, 2010
From: STEVENS, KENNETH S.; YU, YANG
To: BOARD OF REGENTS, UNIVERSITY OF UTAH
Reel/Frame 024015/0509 →