IP Library Assignment 026457/0081
Patent Assignment
Reel/Frame 026457/0081

Assignment of Assignor's Interest

Recorded: 2011-06-17 Pages: 2
Assignors
KALFON, SHAI
Executed: 2011-05-08
RABINOVITCH, ALEXANDER
Executed: 2011-05-08
Assignee
LSI CORPORATION
1621 BARBER LANE, MILPITAS, CALIFORNIA, 95035
Covered Property (1)
Turbo Parallel Concatenated Convolutional Code Implementation on Multiple-Issue Processor Cores
Patent: 8,583,993 →
Application: 13/162,734 →
Publication: US 2012/0324316
Related Assignments (4)
Other recorded transfers of the patent in this record — the chain of ownership.
Patent Security Agreement May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
Assignment of Assignor's Interest Feb 24, 2015
From: LSI CORPORATION
To: INTEL CORPORATION
Reel/Frame 035090/0477 →
Termination and Release of Security Interest in Patents at Reel/Frame No. 32856/0031 May 29, 2015
From: DEUTSCHE BANK AG NEW YORK BRANCH
To: LSI CORPORATION
Reel/Frame 035797/0943 →
Termination and Release of Security Interest in Patent Rights (Releases Rf 032856-0031) Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →