IP Library Assignment 026846/0954
Patent Assignment
Reel/Frame 026846/0954

Release of Security Interest

Recorded: 2011-09-01 Pages: 6
Assignor
Assignee
ATRENTA, INC.
2077 GATEWAY DRIVE, SUITE 300, SAN JOSE, CALIFORNIA, 95110
Covered Property (1)
Chip Development System Enabled for the Handling of Multi-Level Circuit Design Data
Patent: 7,421,670 →
Application: 11/260,225 →
Publication: US 2006/0048083
Related Assignments (4)
Other recorded transfers of the patent in this record — the chain of ownership.
Security Agreement Feb 2, 2006
From: ATRENTA, INC.
To: HERCULES TECHNOLOGY GROWTH CAPITAL, INC.
Reel/Frame 017105/0594 →
Security Agreement Apr 15, 2009
From: ATRENTA INC.
To: SILICON VALLEY BANK
Reel/Frame 022542/0570 →
Release of Security Interest Sep 10, 2015
From: SILICON VALLEY BANK
To: ATRENTA INC.
Reel/Frame 036584/0644 →
Assignment of Assignor's Interest Sep 25, 2015
From: ATRENTA INC.
To: SYNOPSYS, INC.
Reel/Frame 036687/0290 →