Patent Assignment
Reel/Frame 026876/0329
Assignment of Assignor's Interest
Recorded: 2011-09-08
Pages: 2
Assignor
CHENE, MON-REN, MR.
Executed: 2011-05-25
Assignee
S2C INC.
1754 TECHNOLOGY DRIVE, SUITE 206, SAN JOSE, CALIFORNIA, 95110
Covered Properties
(2)
Logic Verification Module Apparatus to Serve as a Hyper Prototype for Debugging an Electronic Design That Exceeds the Capacity of a Single Fpga
Logic verification module apparatus to serve as a hyper prototype for debugging an electronic design that exceeds the capacity of a single FPGA
Application:
61/485,177 →
Related Assignments
(2)
Other recorded transfers of the patents in this record — the chain of ownership.