IP Library Assignment 028251/0449
Patent Assignment
Reel/Frame 028251/0449

Assignment of Assignor's Interest

Recorded: 2012-05-22 Pages: 9
Assignor
FULCRUM MICROSYSTEMS, INC.
Executed: 2012-02-09
Assignee
INTEL CORPORATION
2200 MISSION COLLEGE BOULEVARD, SANTA CLARA, CALIFORNIA, 95052
Covered Properties (22)
Asynchronous Crossbar with Deterministic or Arbitrated Control
Patent: 7,283,557 →
Application: 10/136,025 →
Publication: US 2003/0146073
Techniques for Facilitating Conversion Between Asynchronous and Synchronous Domains
Patent: 6,950,959 →
Application: 10/212,574 →
Publication: US 2003/0159078
Asynchronous Crossbar with Deterministic or Arbitrated Control
Patent: 7,274,709 →
Application: 10/237,358 →
Publication: US 2003/0146074
Asynchronous Crossbar with Deterministic or Arbitrated Control
Patent: 7,274,710 →
Application: 10/237,406 →
Publication: US 2003/0146075
Techniques for Facilitating Conversion Between Asynchronous and Synchronous Domains
Patent: 6,961,863 →
Application: 10/281,424 →
Publication: US 2003/0165158
Methods and Apparatus for Facilitating Physical Synthesis of an Integrated Circuit Design
Patent: 6,785,875 →
Application: 10/354,272 →
Publication: US 2004/0034844
Optimization of Cell Subtypes in a Hierarchical Design Flow
Patent: 6,854,096 →
Application: 10/620,330 →
Publication: US 2004/0103377
Methods and Apparatus for Providing Test Access to Asynchronous Circuits and Systems
Patent: 7,260,753 →
Application: 10/628,074 →
Publication: US 2005/0013356
Asynchronous System-on-a-Chip Interconnect
Patent: 7,239,669 →
Application: 10/634,597 →
Publication: US 2004/0151209
Asynchronous Multiple-Order Issue System Architecture
Patent: 7,698,535 →
Application: 10/667,152 →
Publication: US 2004/0111589
Asynchronous Static Random Access Memory
Patent: 7,050,324 →
Application: 10/890,816 →
Publication: US 2005/0024928
Asynchronous Static Random Access Memory
Patent: 7,161,828 →
Application: 11/200,722 →
Publication: US 2005/0276095
Shared-Memory Switch Fabric Architecture
Patent: 7,814,280 →
Application: 11/208,451 →
Publication: US 2006/0155938
Logic Synthesis of Multi-Level Domino Asynchronous Pipelines
Patent: 7,584,449 →
Application: 11/271,323 →
Publication: US 2006/0120189
Flow and Congestion Control in Switch Architectures for Multi-Hop, Memory Efficient Fabrics
Patent: 7,916,718 →
Application: 11/737,511 →
Publication: US 2008/0259798
Global Ports in Multi-Switch Systems
Patent: 8,098,574 →
Application: 12/198,347 →
Publication: US 2010/0054117
Pseudo Dual-Port Sram and a Shared Memory Switch Using Multiple Memory Banks and a Sideband Memory
Patent: 8,370,557 →
Application: 12/340,022 →
Publication: US 2010/0161892
Logic Synthesis of Multi-Level Domino Asynchronous Pipelines
Patent: 8,051,396 →
Application: 12/435,270 →
Publication: US 2009/0217232
Switch Fabric Primitives
Patent: 8,958,419 →
Application: 12/483,662 →
Publication: US 2009/0310616
Configurable Frame Processing Pipeline in a Packet Switch
Patent: 8,571,031 →
Application: 12/575,175 →
Publication: US 2011/0080916
Binary Search Pipeline
Patent: 8,954,661 →
Application: 12/944,350 →
Publication: US 2012/0110049
Flow and Congestion Control in Switch Architectures for Multi-Hop, Memory Efficient Fabrics
Patent: 8,467,342 →
Application: 12/986,031 →
Publication: US 2011/0164496
Related Assignments (1)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Aug 15, 2022
From: INTEL CORPORATION
To: TAHOE RESEARCH, LTD.
Reel/Frame 061175/0176 →