Patent Assignment
Reel/Frame 028450/0068
Assignment of Assignor's Interest
Recorded: 2012-06-27
Pages: 5
Assignors
PANIGRAHI, AVISHEK
Executed: 2007-10-26
BANERJEE, SOUMYA
Executed: 2007-10-26
CHANAK, THOMAS STEPHEN, JR.
Executed: 2007-10-26
Assignee
MIPS TECHNOLOGIES, INC.
955 EAST ARQUES AVENUE, SUNNYVALE, CALIFORNIA, 94085-4521
Covered Property
(1)
Automated Digital Circuit Design Tool That Reduces or Eliminates Adverse Timing Constraints Due to an Inherent Clock Signal Skew, and Applications Thereof
Related Assignments
(2)
Other recorded transfers of the patent in this record — the chain of ownership.