Patent Assignment
Reel/Frame 037278/0746
Merger and Change of Name
Recorded: 2015-12-12
Pages: 11
Assignors
ORACLE USA, INC.
Executed: 2010-02-12
SUN MICROSYSTEMS, INC.
Executed: 2010-02-12
ORACLE AMERICA, INC.
Executed: 2010-02-12
Assignee
ORACLE AMERICA, INC.
500 ORACLE PARKWAY, REDWOOD SHORES, CALIFORNIA, 94065
Covered Properties
(100)
Retrieving Information from a Broadcast Signal
Patent:
6,658,662 →
Application:
08/885,801 →
System and Method for Reducing the Footprint of Preloaded Classes
Patent:
6,658,492 →
Application:
09/045,508 →
Method and Apparatus of Supporting an Audio Protocol in a Network Environment
Patent:
6,675,054 →
Application:
09/063,341 →
Distributed Filtering and Monitoring System for a Computer Internetwork
Patent:
6,658,565 →
Application:
09/088,348 →
Techniques for Implementing Pluggable Virtual Machines
Patent:
6,651,080 →
Application:
09/216,020 →
Method and Apparatus for Managing a Network Flow in a High Performance Network Interface
Patent:
6,650,640 →
Application:
09/259,932 →
Method and Apparatus for Adaptably Providing Data to a Network Environment
Automated Referential Integrity Maintenance
Patent:
6,651,047 →
Application:
09/314,802 →
Methods and Apparatus for Permitting Transactions Across Firewalls
Patent:
6,654,892 →
Application:
09/328,178 →
Independent Log Containment Hierarchy
Patent:
6,658,420 →
Application:
09/330,514 →
Distributed Authentication Mechanisms for Handling Diverse Authentication Systems in an Enterprise Computer System
Patent:
6,668,327 →
Application:
09/332,775 →
Bounding Delays and Reducing Threading Overheads in Caching
Patent:
6,665,704 →
Application:
09/335,752 →
Memory Efficient Variable-Length Encoding/Decoding System
Patent:
6,668,092 →
Application:
09/364,311 →
Access Management System and Method Employing Secure Credentials
Patent:
6,668,322 →
Application:
09/368,502 →
Exception Handling for Simd Floating Point-Instructions Using a Floating Point Status Register to Report Exceptions
Execution of Instructions Using Op Code Lengths Longer Than Standard Op Code Lengths to Encode Data
Patent:
6,675,298 →
Application:
09/377,298 →
Microprocessor Instruction Result Obfuscation
Patent:
6,665,796 →
Application:
09/377,299 →
Parallel Join Operation to Support Space and Time Dimensional Program Execution
Patent:
6,658,451 →
Application:
09/418,625 →
Method and Apparatus for Providing Secure Communication with a Relay in a Network
Patent:
6,643,701 →
Application:
09/441,451 →
System and Method for Ensuring Delivery of a Single Communication Between Nodes
Patent:
6,662,213 →
Application:
09/480,010 →
Method and Apparatus for Providing Scalable Services Using a Packet Distribution Table
Patent:
6,667,980 →
Application:
09/480,147 →
Emulation of Persistent Group Reservations
Patent:
6,658,587 →
Application:
09/480,329 →
Internet Server Authentication Client
Patent:
6,662,228 →
Application:
09/495,565 →
Region Based Optimizations Using Data Dependence Graphs
Patent:
6,654,952 →
Application:
09/497,820 →
Optimized System and Method for Parallel Leading One/Zero Anticipation
Patent:
6,654,775 →
Application:
09/511,218 →
User Level Web Server in-Kernel Network I/O Accelerator
Patent:
6,668,279 →
Application:
09/513,320 →
Converting an Arbitrary Fixed Point Value to a Floating Point Value
Patent:
6,671,796 →
Application:
09/513,494 →
Method and Apparatus for Distributing Load in a Computer Environment
Patent:
6,658,473 →
Application:
09/513,655 →
Graphics System Configured to Interpolate Pixel Values
Patent:
6,664,955 →
Application:
09/526,327 →
Integrated Circuit Having Distributed Control and Status Registers and Associated Signal Routing Means
Patent:
6,640,322 →
Application:
09/532,383 →
Modulo Scheduling via Binary Search for Minimum Acceptable Initiation Interval Method and Apparatus
Patent:
6,671,878 →
Application:
09/535,930 →
Block-Based, Adaptive, Lossless Image Coder
Patent:
6,654,503 →
Application:
09/560,440 →
Block-Based, Adaptive, Lossless Video Coder
Patent:
6,654,419 →
Application:
09/561,299 →
Avoiding Gather and Scatter When Calling Fortran 77 Code from Fortran 90 Code
Patent:
6,647,546 →
Application:
09/563,429 →
Keyboard Navigation of Non-Focusable Components
Patent:
6,654,038 →
Application:
09/586,041 →
System and Method of Operating a Dynamic Flip-Flop in Power Down Mode with Shut-Off Circuit
Patent:
6,654,893 →
Application:
09/586,476 →
Method and Apparatus for Computing Parallel Leading Zero Count with Offset
Patent:
6,654,776 →
Application:
09/587,176 →
Load-Balanced Anycasting and Routing in a Network
Patent:
6,658,479 →
Application:
09/607,639 →
Two-Dimensional Storage Array with Prompt Parity in One Dimension and Delayed Parity in a Second Dimension
Patent:
6,675,318 →
Application:
09/624,851 →
Method and Apparatus for Representing Arithmetic Intervals Within a Computer System
Patent:
6,658,443 →
Application:
09/629,935 →
Caching Pattern and Method for Caching in an Object-Oriented Programming Environment
Patent:
6,651,140 →
Application:
09/654,184 →
High Bandwidth Network and Storage Card
Patent:
6,651,131 →
Application:
09/656,354 →
Mechanism and Apparatus for Using Messages to Look Up Documents Stored in Spaces in a Distributed Computing Environment
Patent:
6,643,650 →
Application:
09/660,548 →
Remote Incremental Program Verification Using Api Definitions
Patent:
6,651,186 →
Application:
09/662,503 →
Sharing Arbiter
Patent:
6,675,246 →
Application:
09/667,118 →
System and Method for a Software Controlled Cache
Patent:
6,668,307 →
Application:
09/677,092 →
Smoothing of Line Segments on a Computer Display
Patent:
6,654,017 →
Application:
09/679,430 →
Method for on-Line Circuit Debug Using Jtag and Shadow Scan in a Microprocessor
Patent:
6,671,841 →
Application:
09/680,237 →
Method and Apparatus for Interfacing with a Secondary Storage System
Patent:
6,665,747 →
Application:
09/686,110 →
Constant Time Reference for Os Support in Different Frequency Modes
Patent:
6,668,330 →
Application:
09/686,205 →
High-Performance Memory Module
Patent:
6,658,530 →
Application:
09/687,202 →
Method and Apparatus for Serial Coolant Flow Control
Patent:
6,655,917 →
Application:
09/691,483 →
Digital Process Monitor
Patent:
6,668,346 →
Application:
09/709,970 →
Method and Apparatus for Performing a Mask-Driven Interval Division Operation
Patent:
6,658,444 →
Application:
09/710,453 →
Method and Apparatus for Compiling Dependent Subtraction Operations on Arithmetic Intervals
Patent:
6,668,268 →
Application:
09/711,095 →
Method for Using Multipurpose Internet Mail Extension Types for Automatically Detecting Scalable Vector Graphics Support in Client Browsers
Method and Apparatus for the Staggered Startup of Hard Disk Drives
Patent:
6,668,305 →
Application:
09/760,963 →
System and Method for Topology Based Noise Estimation for Submicron Integrated Circuit Designs
Patent:
6,665,845 →
Application:
09/812,406 →
Method to Reduce Leakage During a Semi-Conductor Burn-in Procedure
Process Monitoring in a Computer System
Deletions on Circular Singly Linked Lists
Splitting Grouped Writes to Different Memory Blocks
Multi-Channel, Demand-Driven Display Controller
Method and Apparatus for Reducing Inefficiencies in Shared Memory Devices
Computer Bus Rack Having an Increased Density of Card Slots
Measuring Skew Using on-Chip Sampling
Method and System for Providing a Netlist Driven Integrated Router in a Non-Netlist Driven Environment
Method and Apparatus for Replacing a Filter
Facilitating Heat Transfer from an Integrated Circuit Package
Computer System and Enclosure Thereof
Multiple Discharge Capable Bit Line
System for Facilitating Alignment of Silicon Die
Back-Biased Mos Device
Patent:
6,664,608 →
Application:
09/996,705 →
Decoupling Capacitor Assignment Technique with Respect to Leakage Power
Piecewise Linear Cost Propagation for Path Searching
Increasing Implicit Decoupling Capacitance Using Asymmetric Shieldings
High Performance Address Decode Technique for Arrays
Method for Clocking Charge Recycling Differential Logic
System and Method of Placing Components for Minimizing Wire Congestion and Wire Length in Performing a Function
Delay Variability Reduction Method and Apparatus
Patent:
6,664,850 →
Application:
10/027,799 →
Marginable Clock-Derived Reference Voltage Method and Apparatus
Patent:
6,658,061 →
Application:
10/027,812 →
Module and Connector Having Multiple Contact Rows
Using a Push/Pull Buffer to Improve Delay Locked Loop Performance
Electromagnetic Interference Shields
Rack Mountable Systems
Method and Apparatus for Improving Critical Path Analysis Using Gate Delay
Optimization of Loop Bandwidth for a Phase Locked Loop
Register Stack in Cache Memory
Post-Silicon Control of Phase Locked Loop Charge Pump Current
Circuit for Post-Silicon Control of Delay Locked Loop Charge Pump Current
Method and Apparatus for Removing Heat from an Electronic Device
Technique for Optimizing Decoupling Capacitance Subject to Leakage Power Constraints
Clock Power Reduction Technique Using Multi-Level Voltage Input Clock Driver
Patent:
6,646,472 →
Application:
10/156,249 →
Multiple Supply Voltage Dynamic Logic
Patent:
6,646,473 →
Application:
10/170,845 →
On-Chip Power Supply Noise Reduction
Patent:
6,664,848 →
Application:
10/180,794 →
Graphics System Having a Super-Sampled Sample Buffer and Having Single Sample Per Pixel Support
Frequency Multiplier Design
Patent:
6,642,756 →
Application:
10/202,798 →
Disc Drive Cage
Patent:
6,661,677 →
Application:
10/217,157 →
Virtual Machine with Securely Distributed Bytecode Verification
Circuit Board with Low Profile Switch Assembly
Patent:
6,643,143 →
Application:
10/342,405 →