Patent Assignment
Reel/Frame 037278/0801
Merger and Change of Name
Recorded: 2015-12-12
Pages: 11
Assignors
ORACLE USA, INC.
Executed: 2010-02-12
SUN MICROSYSTEMS, INC.
Executed: 2010-02-12
ORACLE AMERICA, INC.
Executed: 2010-02-12
Assignee
ORACLE AMERICA, INC.
500 ORACLE PARKWAY, REDWOOD SHORES, CALIFORNIA, 94065
Covered Properties
(100)
Method and Apparatus for Discovering and Activating Software Components
Techniques for Securing Data Flow in Internet Multicasting
Patent:
6,816,966 →
Application:
08/885,817 →
Method and Apparatus for Detecting Facsimile Transmissions Over a Network
Apparatus and Method for Providing a Cyclic Buffer Using Logical Blocks
Patent:
6,807,615 →
Application:
09/288,023 →
Context Based Control Data
Patent:
6,807,181 →
Application:
09/314,804 →
Mechanism for Embedding Network Based Control Systems in a Local Network Interface Device
Patent:
6,795,923 →
Application:
09/382,265 →
Method and Apparatus for Presenting Anonymous Group Names
Patent:
6,801,998 →
Application:
09/439,246 →
Method and Apparatus for Alleviating Cell Packing Problems in Bundled Link Systems
Patent:
6,804,258 →
Application:
09/456,740 →
Truly Anonymous Communications Using Supernets, Witn the Provision of Topology Hiding
Patent:
6,798,782 →
Application:
09/457,917 →
Hierarchical Watermarking of Content That Is Distributed via a Network
Patent:
6,804,779 →
Application:
09/480,742 →
Method and Apparatus for Arbitrary Resolution Interval Timeout with a Clock System That Does Not Directly Exchange Infromation with the Processor
Patent:
6,823,467 →
Application:
09/512,842 →
Method and Apparatus for Creating an Index for a Structured Document Based on a Stylesheet
Patent:
6,823,492 →
Application:
09/513,439 →
Network Configuration and Management for Dynamic Networks and Methods Thereof
Patent:
6,795,846 →
Application:
09/537,961 →
Method and Apparatus for Performing Fused Instructions
Patent:
6,813,626 →
Application:
09/542,317 →
Abstract Syntax Notation to Interface Definition Language Converter Framework for Network Management
Patent:
6,813,770 →
Application:
09/557,069 →
Method and Apparatus for Restraining Connection Request Stream Associated with High Volume Burst Client in a Distributed Network
Patent:
6,799,276 →
Application:
09/604,553 →
Using a Differential Signal in Adjusting a Slice Voltage for a Single-Ended Signal
Patent:
6,801,584 →
Application:
09/610,176 →
System and Method for Implementing a Routing Scheme in a Computer Network Using Intention Packets When Fault Conditions Are Detected
Patent:
6,826,148 →
Application:
09/624,850 →
Tunable Broadcast/Point-to-Point Packet Arbitration
Patent:
6,813,267 →
Application:
09/658,782 →
Method and Apparatus for Forwarding Packet Fragments
Patent:
6,795,866 →
Application:
09/662,560 →
Local Allocation Buffers for Parallel Garbage Collection
Patent:
6,826,583 →
Application:
09/697,228 →
Work-Stealing Queues for Parallel Garbage Collection
Patent:
6,823,351 →
Application:
09/697,729 →
Method and Apparatus for Interfacing a Javascript Interpreter with Library of Host Objects Implemented in Java
Patent:
6,823,504 →
Application:
09/714,050 →
Apparatus and Methods for Communicating Between Resource Domains
System and Method for Efficient Data Mirroring in a Pair of Storage Devices
Method for Efficient Computation of Point Doubling Operation of Elliptic Curve Point Scalar Multiplication Over Finite Fields F(2M)
Method, System, and Program for Managing the Rate at Which Client Requests for a Service Are Transmitted
Methods and Apparatus for Optimizing Garbage Collection
Method and Apparatus for Bag-to-Set, Buffering Remembered Set
Bus Bridge Resource Access Controller
Mechanism for Avoiding Multiple Traps After Faulty Access to a Resource
Processoe Resource Access Control with Response Faking
Methods and Apparatus for Associating Character Codes with Optimized Character Codes
Processing Architecture Having Field Swapping Capability
System for Reading Directory Structured Configuration Rom with Indirect Entries by Pushing Position of Indirect Entry Onto a Directory Stack Upon Finding of Indirect Entry
Self-Checking Multi-Threaded Processor
System and Method for Building Packets
Lock-Free Implementation of Concurrent Shared Object with Dynamic Node Allocation and Distinguishing Pointer Value
Method and System for Providing Cluster Replicated Checkpoint Services
Method and Apparatus for Implementing Timers for Enterprise Javabean Components
Identifying and Tracking Object References in a Java Programming Environment
Frameworks for Accessing Java Class Files
Object Sampling Technique for Runtime Observations of Representative Instances Thereof
Signature Analysis Registers for Testing a Computer Graphics System
Sample Cache for Supersample Filtering
Hot Swappable Electronic Module with Non-Staggered Connectors
Graphics System with Real-Time Convolved Pixel Readback
Graphics System Configured to Parallel-Process Graphics Data Using Multiple Pipelines
Teamware Server Working Over Http/Https Connections
Method and Apparatus for Application Packages and Delegate Packages to Adopt and Export Standard Execution State Machine Interfaces
Method of Synchronizing Arbiters Within a Hierarchical Computer System
High-Speed First-in-First-Out Buffer
Method and Apparatus for Detecting Corrupt Software Code
Built-In Self-Testing for Double Data Rate Input/Output
Automatic Generation and Validation of Memory Test Models
Inter-Domain Data Transfer
Methods and Apparatus for Executing Code While Avoiding Interference
Patent:
6,799,236 →
Application:
10/044,214 →
Demand-Based Memory-Block Splitting
Batch Processing of Primitives for Use with a Texture Accumulation Buffer
Vertex Assembly Buffer and Primitive Launch Buffer
Parallel Read with Source-Clear Operation
Jitter Estimation for a Phase Locked Loop
Increasing Power Supply Noise Rejection Using Linear Voltage Regulators in an on-Chip Temperature Sensor
Quantifying a Difference Between Nodal Voltages
Reading or Writing a Non-Super Sampled Image into a Super Sampled Buffer
System and Method for Handling Display Device Requests for Display Data from a Frame Buffer
Memory Interleaving Technique for Texture Mapping in a Graphics System
System and Method for Prefetching Data from a Frame Buffer
System and Method for Automatically Partitioning an Application Between a Web Server and an Application Server
Method and Apparatus for Sharing Code Containing References to Non-Shared Objects
Method and Apparatus for Isolating the Root of Indeterminate Logic Values in an Hdl Simulation
Extended Message Block for Network Device Drivers
Cooling Power Supplies
Virtual Ground Circuit
Initializing a Series of Video Routers That Employ Source-Synchronous Signaling
Design-For-Test Technique for a Delay Locked Loop
Data Management to Enable Video Rate Anti-Aliasing Convolution
Correction of Spacing Violations Between Dummy Geometries and Wide Class Objects of Design Geometries
Method and Apparatus for Hardware Acceleration of Graphical Fill in Display Systems
Method and Apparatus for Electronically Aligning Capacitively Coupled Chip Pads
Computer System
Active Pulsed Scheme for Driving Long Interconnects
Sstl Voltage Translator with Dynamic Biasing
Redundant via Rule Check in a Multi-Wide Object Class Design Layout
Ring Oscillator with a Digitally Programmable Frequency
Protection Element for an Emi Reduction Element
Dividing and Distributing the Drive Strength of a Single Clock Buffer
Measuring Maximum Memory Requirement of an Application at Any Point Through Continuous Use of Garbage Collector
System and Method for Sharing Memory Among Multiple Storage Device Controllers
Timing Analysis of Latch-Controlled Digital Circuits with Detailed Clock Skew Analysis
Replacement Algorithm for a Replicated Fully Associative Translation Look-Aside Buffer
Clock Frequency Multiplier
On-Die Thermal Monitoring Technique
Variation Reduction Technique for Charge Pump Transistor Aging
Negative Bias Temperature Instability Correction Technique for Delay Locked Loop and Phase Locked Loop Bias Generators
Extending Non-Volatile Memory Endurance Using Data Encoding
Pattern Based Dynamic Drive Current Balancing for Data Transmission
Dll Static Phase Error Measurement Technique
Method and Apparatus for Prevention of Read Corruption in Rotated-Read Register Files and Content Addressable Memory Arrays
Patent:
6,829,196 →
Application:
10/631,379 →
Capacitor Having Plates with a Pattern Void of Conductive Material and Method of Making Therfor
Patent:
6,798,640 →
Application:
10/653,832 →
Related Assignments
(1)
Other recorded transfers of the patents in this record — the chain of ownership.