IP Library Assignment 037280/0221
Patent Assignment
Reel/Frame 037280/0221

Merger and Change of Name

Recorded: 2015-12-14 Pages: 11
Assignors
ORACLE USA, INC.
Executed: 2010-02-12
SUN MICROSYSTEMS, INC.
Executed: 2010-02-12
ORACLE AMERICA, INC.
Executed: 2010-02-12
Assignee
ORACLE AMERICA, INC.
500 ORACLE PARKWAY, REDWOOD SHORES, CALIFORNIA, 94065
Covered Properties (100)
Computer Resource Management for Competing Processes
Patent: 7,036,124 →
Application: 09/259,589 →
Apparatus and Methods for Managing Resource Usage
Patent: 7,028,298 →
Application: 09/394,118 →
Static Scheduling of Test Cases
Patent: 7,031,900 →
Application: 09/479,774 →
Object Oriented Mechanism for Dynamically Constructing Customized Implementations to Enforce Restrictions
Patent: 7,051,067 →
Application: 09/483,723 →
Adaptive Memory Allocation
Patent: 7,035,989 →
Application: 09/504,876 →
Apparatus and Method for Finding the Longest Matching Prefix in a Router
Patent: 7,027,445 →
Application: 09/580,022 →
Java Virtual Machine Configurable to Perform as a Web Server
Patent: 7,039,691 →
Application: 09/585,945 →
Efficient Clip-Testing in Graphics Acceleration
Patent: 7,042,466 →
Application: 09/589,039 →
Web Server in-Kernel Interface to Data Transport System and Cache Manager
Patent: 7,028,091 →
Application: 09/654,103 →
Automatic Link Failover in Data Networks
Patent: 7,042,837 →
Application: 09/697,663 →
Facilitating Value Prediction to Support Speculative Program Execution
Patent: 7,051,192 →
Application: 09/761,217 →
Publication: US 2003/0079116
Processing Architecture Having a Compare Capability
Patent: 7,028,170 →
Application: 09/802,291 →
Publication: US 2002/0019928
General Remote Using Spoken Commands
Patent: 7,039,590 →
Application: 09/822,617 →
Publication: US 2002/0143555
System Using Fair-Share Scheduling Technique to Schedule Processes Within Each Processor Set Based on the Number of Shares Assigned to Each Process Group
Patent: 7,036,123 →
Application: 09/843,426 →
Publication: US 2002/0161817
Cluster Membership Monitor
Patent: 7,039,694 →
Application: 09/847,044 →
Publication: US 2002/0042693
Methods and Apparatus for Creating and Transforming Graphical Constructs
Patent: 7,024,633 →
Application: 09/855,968 →
Method and Apparatus for Generating Web Pages from Templates
Patent: 7,039,658 →
Application: 09/919,052 →
Publication: US 2002/0059327
Two Tier Clusters for Representation of Objects in Java Programming Environments
Patent: 7,036,120 →
Application: 09/919,743 →
Publication: US 2003/0028865
Client Controlled Data Recovery Management
Patent: 7,050,589 →
Application: 09/931,004 →
Publication: US 2003/0035548
Dynamic Bandwidth Adaptive Image Compression/Decompression Scheme
Patent: 7,024,045 →
Application: 09/934,776 →
Publication: US 2003/0039398
Frameworks for Generation of Java Macro Instructions for Storing Values into Local Variables
Patent: 7,039,904 →
Application: 09/939,106 →
Publication: US 2003/0041317
Service Processor and System and Method Using a Service Processor
Patent: 7,039,918 →
Application: 09/939,117 →
Publication: US 2002/0091869
Discovery of Nodes in an Interconnection Fabric
Patent: 7,027,413 →
Application: 09/967,142 →
Publication: US 2003/0065969
Method and System for Managing a Directory with a Template
Patent: 7,051,030 →
Application: 09/973,184 →
Publication: US 2003/0037052
Method, System, and Program for Managing Accesses to Data Objects by Multiple User Programs Over a Network
Patent: 7,051,031 →
Application: 09/973,784 →
Publication: US 2004/0107405
Stream Operator in a Dynamically Typed Programming Language
Patent: 7,028,289 →
Application: 09/977,507 →
Publication: US 2003/0093592
Applying Term Consistency to the Solution of Unconstrained Interval Global Optimization Problems
Patent: 7,028,016 →
Application: 09/991,476 →
Publication: US 2003/0097191
Method and Apparatus for Arbitrating Master-Slave Transactions
Patent: 7,043,533 →
Application: 10/008,349 →
Publication: US 2003/0110231
Filter-Based Attribute Value Access Control
Patent: 7,024,693 →
Application: 10/010,748 →
Publication: US 2003/0105978
Modeling Custom Scan Flops in Level Sensitive Scan Design
Patent: 7,039,843 →
Application: 10/012,130 →
Publication: US 2003/0093733
Applying Term Consistency to an Inequality Constrained Interval Global Optimization Problem
Patent: 7,028,065 →
Application: 10/017,574 →
Publication: US 2003/0115230
Error Recovery
Patent: 7,032,123 →
Application: 10/043,974 →
Publication: US 2003/0084369
Technique for Associating Execution Characteristics with Instructions or Operations of Program Code
Patent: 7,039,910 →
Application: 10/050,387 →
Publication: US 2003/0101443
Service Management System for Configuration Information
Patent: 7,032,014 →
Application: 10/053,986 →
Publication: US 2003/0200288
Geometric Folding for Cone-Tree Data Compression
Patent: 7,050,053 →
Application: 10/060,979 →
Publication: US 2003/0160776
Active Block Write-Back from Sram Cache to Dram
Patent: 7,027,064 →
Application: 10/086,174 →
Publication: US 2003/0160796
Graphical User Interface for Indicating Device Failover
Patent: 7,027,053 →
Application: 10/086,962 →
Publication: US 2003/0160781
Method and Apparatus for Managing a Data Imaging System Using Cim Providers in a Distributed Computer System
Patent: 7,043,738 →
Application: 10/092,070 →
Publication: US 2003/0172088
Flexible System Architecture with Common Interface for Multiple System Functions
Patent: 7,043,585 →
Application: 10/099,378 →
Publication: US 2003/0188067
Method and Apparatus for Configuring a Clock Timing Feedback Path
Patent: 7,051,224 →
Application: 10/100,126 →
Publication: US 2003/0177407
Method and Apparatus for Improving Transaction Specification by Marking Application States
Patent: 7,028,055 →
Application: 10/104,905 →
Publication: US 2003/0182318
Mechanism to Manage the Lifecycle of a Resource Adapter
Patent: 7,036,110 →
Application: 10/106,671 →
Publication: US 2003/0182459
Method and Apparatus for Cycle-Based Computation
Patent: 7,036,114 →
Application: 10/113,005 →
Publication: US 2003/0040896
Method and Apparatus for Simulation Processor
Patent: 7,043,596 →
Application: 10/113,060 →
Publication: US 2003/0040898
Generating a Description of a Configuration for a Virtual Network System
Patent: 7,043,539 →
Application: 10/113,845 →
Method and System for Implementing Policies, Resources and Privileges for Using Services in Ldap
Patent: 7,031,967 →
Application: 10/118,885 →
Publication: US 2003/0191763
Method and Apparatus for Facilitating Compact Object Headers
Patent: 7,028,287 →
Application: 10/122,071 →
Publication: US 2003/0093577
Class Dependency Graph-Based Class Loading and Reloading
Patent: 7,039,923 →
Application: 10/125,949 →
Publication: US 2003/0200350
Mechanism for Reformatting a Simple Source Code Statement into a Compound Source Code Statement
Patent: 7,043,720 →
Application: 10/128,162 →
Publication: US 2003/0200534
Method and Apparatus for Managing Remote Data Replication Using Cim Providers in a Distributed Computer System
Patent: 7,043,732 →
Application: 10/134,711 →
Publication: US 2003/0204557
System and Method for Topology Manager Employing Finite State Automata for Dynamic Cluster Formation
Patent: 7,024,483 →
Application: 10/134,956 →
Publication: US 2003/0204273
System and Method Dynamic Cluster Membership in a Distributed Data System
Patent: 7,035,858 →
Application: 10/134,961 →
Publication: US 2003/0204509
Shared Memory Multiprocessing System Employing Mixed Broadcast Snooping and Directory Based Coherency Protocols
Patent: 7,032,078 →
Application: 10/136,619 →
Publication: US 2003/0018739
Method and Apparatus for Maintaining Data Integrity
Patent: 7,039,649 →
Application: 10/150,773 →
Publication: US 2003/0217164
Method, System, and Program for Using Buffers to Provide Property Value Information for a Device
Patent: 7,032,071 →
Application: 10/153,546 →
Publication: US 2003/0221051
Error Detection Using Data Block Mapping
Patent: 7,036,066 →
Application: 10/155,329 →
Publication: US 2003/0221155
Input Field Constraint Mechanism
Patent: 7,028,288 →
Application: 10/161,515 →
Publication: US 2003/0226115
Mechanism for Enabling Efficient Testing of a Set of Computer Code
Patent: 7,039,902 →
Application: 10/164,820 →
Publication: US 2003/0229889
Register Window Fill Technique for Retirement Window Having Entry Size Less Than Amount of Fill Instructions
Patent: 7,035,999 →
Application: 10/165,256 →
Publication: US 2003/0229772
Register Window Spill Technique for Retirement Window Having Entry Size Less Than Amount of Spill Instructions
Patent: 7,024,541 →
Application: 10/165,268 →
Publication: US 2003/0229771
Apparatus and Method for Random Number Generation
Patent: 7,028,059 →
Application: 10/179,141 →
Publication: US 2003/0236803
Circuit Board Orientation in a Computer System
Patent: 7,050,307 →
Application: 10/185,241 →
Publication: US 2004/0002237
Method and System for Striping Data to Accommodate Integrity Metadata
Patent: 7,051,155 →
Application: 10/212,861 →
Publication: US 2004/0024963
System and Method for Processing Node Interrupt Status in a Network
Patent: 7,028,122 →
Application: 10/213,982 →
Publication: US 2004/0030819
A Server Blade for Performing Load Balancing Functions
Patent: 7,032,037 →
Application: 10/215,667 →
Publication: US 2003/0105903
Matrix Transposition in a Computer System
Patent: 7,031,994 →
Application: 10/218,312 →
Publication: US 2003/0088600
Multi-Mode Specification-Driven Disassembler
Patent: 7,036,112 →
Application: 10/222,613 →
Publication: US 2004/0034851
Kernel Event Subscription and Publication System and Method
Patent: 7,028,229 →
Application: 10/262,294 →
Publication: US 2004/0064759
Computer System Layout and Cooling Configuration
Patent: 7,036,027 →
Application: 10/274,824 →
Publication: US 2004/0075981
Method for Quantifying I/O Chip/Package Resonance
Patent: 7,043,379 →
Application: 10/277,302 →
Publication: US 2004/0088624
Placement of Allocation Trains in the Train Algorithm
Patent: 7,035,884 →
Application: 10/288,008 →
Publication: US 2004/0088277
Redundant Clock Synthesizer
Patent: 7,043,655 →
Application: 10/288,938 →
Publication: US 2004/0088597
Combining Entries in a Card Object Table
Patent: 7,039,664 →
Application: 10/309,909 →
Publication: US 2004/0111446
Combining External and Intragenerational Reference-Processing in a Garbage Collector Based on the Train Algorithm
Patent: 7,031,990 →
Application: 10/313,254 →
Publication: US 2004/0111447
Better Placement of Objects Reachable from Special Objects During Collection Based on the Train Algorithm
Patent: 7,024,437 →
Application: 10/313,831 →
Publication: US 2004/0111450
System and Method for Efficiently and Reliably Performing Write Cache Mirroring
Patent: 7,028,147 →
Application: 10/319,351 →
Publication: US 2004/0117580
Method and Apparatus for Updating Boot Code Using a System Controller
Patent: 7,024,551 →
Application: 10/337,499 →
Publication: US 2004/0133771
Method and System for Postmortem Object Type Identification
Patent: 7,047,447 →
Application: 10/346,423 →
Publication: US 2004/0143717
Method and Apparatus for Protecting a State Associated with a Memory Structure
Patent: 7,043,609 →
Application: 10/357,643 →
Publication: US 2004/0153609
Data Transmission Update Technique in Low Power Modes
Patent: 7,043,683 →
Application: 10/360,312 →
Publication: US 2004/0156396
Parallel Non-Contiguous Allocation and Card Parsing
Patent: 7,043,509 →
Application: 10/368,970 →
Publication: US 2004/0162861
System and Method to Provide Hot-Swap Status Indication in a Computer System Having Redundant Power Supplies
Patent: 7,030,771 →
Application: 10/386,836 →
Publication: US 2004/0179334
Multi-Texturing by Walking an Appropriately-Sized Supertile Over a Primitive
Patent: 7,023,444 →
Application: 10/393,528 →
Publication: US 2004/0183807
Method and apparatus for identifying computer expansion cards
Patent: 7,035,945 →
Application: 10/402,453 →
Publication: US 2004/0193753
Method and Apparatus for Mapping Memory Addresses to Corresponding Cache Entries
Patent: 7,051,184 →
Application: 10/455,137 →
Publication: US 2004/0225859
Pulsed Dynamic Keeper Gating
Patent: 7,034,576 →
Application: 10/607,949 →
Publication: US 2004/0263208
On-Chip Signal State Duration Measurement and Adjustment
Patent: 7,036,098 →
Application: 10/610,252 →
Publication: US 2004/0268280
Half-Rail Differential Driver Circuit
Patent: 7,030,664 →
Application: 10/611,443 →
Publication: US 2004/0264071
Caching Fonts for Improved Bandwidth of Transmitted Text
Patent: 7,046,250 →
Application: 10/623,058 →
Electronics Assembly with Arrangement for Air Cooling
Patent: 7,027,299 →
Application: 10/643,811 →
Publication: US 2005/0041391
Estimating Capacitances Using Information Including Feature Sizes Extracted from a Netlist
Patent: 7,036,096 →
Application: 10/657,431 →
Low Threshold Voltage Transistor Displacement in a Semiconductor Device
Patent: 7,032,200 →
Application: 10/657,964 →
Electronic Assembly Including a Housing Having a Rotatable Portion
Patent: 7,042,721 →
Application: 10/668,083 →
Publication: US 2005/0063156
Integrated Circuit Repair Using Multiple-Photon Absorption of Laser Light
Patent: 7,041,514 →
Application: 10/672,539 →
Triangle Coverage Estimation and Edge-Correct Tesselation
Patent: 7,042,452 →
Application: 10/677,671 →
System and Method for Providing a Fast and Power Efficient Jam Latch
Patent: 7,042,262 →
Application: 10/698,892 →
Publication: US 2005/0093603
Lidless Chip Package Effectively Having Co-Planar Frame and Semiconductor Die Surfaces
Patent: 7,030,484 →
Application: 10/824,455 →
Integrated Strain Gages for Board Strain Characterization
Patent: 7,036,387 →
Application: 10/842,803 →
Publication: US 2005/0252311
Using Chip Lamination to Couple an Integrated Circuit with a Microstrip Transmission Line
Patent: 7,030,470 →
Application: 10/844,196 →
Floating Input Amplifier for Capacitively Coupled Communication
Patent: 7,026,867 →
Application: 10/879,606 →
Publication: US 2005/0285683