IP Library Assignment 040922/0101
Patent Assignment
Reel/Frame 040922/0101

Corrective Assignment to Correct the Title Inside the Assignment Document Previously Recorded at Reel: 038552 Frame: 0708. Assignor(S) Hereby Confirms the Assignment.

Recorded: 2016-12-14 Pages: 6
Assignors
CHANG, CHI-HAO
Executed: 2016-11-15
CHIANG, TSUNG-HSIEN
Executed: 2016-11-15
CHEN, GUAN-YU
Executed: 2016-11-15
CHANG, WEI SEN
Executed: 2016-11-15
KUO, TIN-HAO
Executed: 2016-11-17
TSAI, HAO-YI
Executed: 2016-11-17
YU, CHEN-HUA
Executed: 2016-11-17
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
NO. 8, LI-HSIN RD. 6, SCIENCE-BASED INDUSTRIAL PARK, HSIN-CHU, 300-77, TAIWAN
Covered Property (1)
Interconnect Structures for Wafer Level Package and Methods of Forming Same
Patent: 9,659,896 →
Application: 15/052,105 →
Publication: US 2016/0172329
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest May 11, 2016
From: CHANG, CHIH-HAO; CHIANG, TSUNG-HSIEN; CHEN, GUAN-YU; CHANG, WEI SEN
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 038552/0708 →