IP Library Assignment 041198/0095
Patent Assignment
Reel/Frame 041198/0095

Assignment of Assignor's Interest

Recorded: 2017-02-07 Pages: 4
Assignor
AXELRAD, VALERY
Executed: 2017-02-06
Assignee
SEQUOIA DESIGN SYSTEMS, INC.
137 CHAPMAN ROAD, WOODSIDE, CALIFORNIA, 94062
Covered Property (1)
Methods and Systems for Reducing Electrical Disturb Effects Between Thyristor Memory Cells Using Buried Metal Cathode Lines
Patent: 9,812,454 →
Application: 15/199,934 →
Publication: US 2017/0229465
Related Assignments (4)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Jun 30, 2016
From: LUAN, HARRY
To: KILOPASS TECHNOLOGY, INC.
Reel/Frame 039061/0463 →
Assignment of Assignor's Interest Feb 7, 2017
From: SEQUOIA DESIGN SYSTEMS, INC.
To: KILOPASS TECHNOLOGY, INC.
Reel/Frame 041198/0103 →
Assignment of Assignor's Interest Feb 7, 2017
From: CHENG, CHARLIE
To: KILOPASS TECHNOLOGY, INC.
Reel/Frame 041198/0114 →
Assignment of Assignor's Interest May 12, 2018
From: KILOPASS TECHNOLOGY, INC.
To: TC LAB, INC.
Reel/Frame 045790/0860 →