IP Library Assignment 042205/0880
Patent Assignment
Reel/Frame 042205/0880

Merger

Recorded: 2017-04-10 Pages: 2
Assignors
CHIPMOS TECHNOLOGIES INC.
Executed: 2016-11-23
Assignee
CHIPMOS TECHNOLOGIES INC.
NO. 1, R&D 1ST RD., SCIENCE-BASED INDUSTRIAL PARK, HSINCHU, TAIWAN
Covered Property (1)
Multi-Chip Package Structure Having Blocking Structure, Wafer Level Chip Package Structure Having Blocking Structure and Manufacturing Process Thereof
Patent: 9,653,429 →
Application: 14/855,397 →
Publication: US 2016/0315067
Related Assignments (2)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Sep 17, 2015
From: CHOU, SHIH-WEN
To: CHIPMOS TECHNOLOGIES INC.; CHIPMOS TECHNOLOGIES (BERMUDA) LTD.
Reel/Frame 036584/0468 →
Merger Mar 9, 2017
From: CHIPMOS TECHNOLOGIES INC.; CHIPMOS TECHNOLOGIES (BERMUDA) LTD.
To: CHIPMOS TECHNOLOGIES INC.
Reel/Frame 041924/0857 →