IP Library Assignment 043757/0926
Patent Assignment
Reel/Frame 043757/0926

Assignment of Assignor's Interest

Recorded: 2017-10-02 Pages: 4
Assignors
HUTTON, MICHAEL D.
Executed: 2017-09-26
KERTESZ, AUDREY
Executed: 2017-09-28
Assignee
INTEL CORPORATION
2200 MISSION COLLEGE BOULEVARD, SANTA CLARA, CALIFORNIA, 95054
Covered Property (1)
Clock Synthesis for Frequency Scaling in Programmable Logic Designs
Application: 15/719,289 →
Publication: US 2019/0097637
Related Assignments (2)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Jan 19, 2024
From: INTEL CORPORATION
To: ALTERA CORPORATION
Reel/Frame 066353/0886 →
Security Interest Sep 12, 2025
From: ALTERA CORPORATION
To: BARCLAYS BANK PLC, AS COLLATERAL AGENT
Reel/Frame 073431/0309 →