IP Library Assignment 043974/0760
Patent Assignment
Reel/Frame 043974/0760

Assignment of Assignor's Interest

Recorded: 2017-10-27 Pages: 3
Assignors
VASUDEVAN, NARASIMHAN
Executed: 2016-06-17
RAO, VENKATA N.S.N.
Executed: 2016-06-17
CHALASANI, PRASAD
Executed: 2016-06-17
Assignee
INVECAS, INC.
2901 TASMAN DRIVE, SUITE 113, SANTA CLARA, CALIFORNIA, 95054
Covered Property (1)
Clock Alignment Scheme for Data Macros of DDR PHY
Application: 15/707,205 →
Publication: US 2018/0006656
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Feb 29, 2020
From: INVECAS, INC.
To: SYNOPSYS, INC.
Reel/Frame 051971/0624 →