Patent Assignment
Reel/Frame 051971/0624
Assignment of Assignor's Interest
Recorded: 2020-02-29
Pages: 10
Assignor
INVECAS, INC.
Executed: 2020-02-13
Assignee
SYNOPSYS, INC.
690 EAST MIDDLEFIELD ROAD, MOUNTAIN VIEW, CALIFORNIA, 94043
Covered Properties
(42)
Voltage Mode Driver Using Pre-emphasis and De-emphasis Signals
Parallel-to-Serial Converter
Patent:
8,643,516 →
Application:
13/669,137 →
Serial-to-Parallel Converter Using Serially-Connected Stages
Methods and Systems for Determining Whether a Receiver Is Present on a Pci-Express Bus
Methods and Systems for Calibration of a Delay Locked Loop
Methods and Systems for Clocking a Physical Layer Interface
Methods and Systems for Distributing Clock and Reset Signals Across An Address Macro
Memory Interface
Voltage Level Shifter
Sense Amplifier and Methods Thereof for Single Ended Line Sensing
Sense Amplifier Having a Timing Circuit for a Presearch and a Main Search
Sense Amplifier for Single-ended Sensing
Memory Built-In Self Test System
Multi-Domain Fuse Management
Diagnostics for a Memory Device
Methods and Systems for Clocking a Physical Layer Interface
Optimal Data Eye for Improved Vref Margin
Patent:
9,715,907 →
Application:
15/150,334 →
TCAM Field Enable Logic
Patent:
9,613,700 →
Application:
15/183,591 →
Clock Alignment Scheme for Data Macros of DDR PHY
Deep-Sleep Wake Up for a Memory Device
Patent:
9,564,180 →
Application:
15/192,697 →
Method and Circuit for Duty Cycle Detection
Patent:
9,716,492 →
Application:
15/241,664 →
Temperature Sensing for Integrated Circuits
Optimal Data Eye for Improved Vref Margin
A System and Method for Multi-Cycle Write Leveling
Asynchronous Clock Gating Circuit
Method for Cycle Accurate Data Transfer in a Skewed Synchronous Clock Domain
A Method for Calibrating the Read Latency of a Ddr Dram Module
System and Method for Controlling Phase Allignment of Clock Signals
Duty Cycle Detection
Voltage Detector
Patent:
10,094,859 →
Application:
15/654,598 →
Digital Voltmeter
Clock Alignment Scheme for Data Macros of DDR PHY
Multi-Protocol Receiver
Bandgap Reference Voltage Generator
Patent:
10,061,340 →
Application:
15/879,355 →
Receiver for Handling High Speed Transmissions
PWM Demodulation
High-Speed DAC
Memory Bypass Function For A Memory
Method and Apparatus of Operating Synchronizing High-Speed Clock Dividers to Correct Clock Skew
Patent:
10,505,550 →
Application:
16/268,206 →
Method and Apparatus for Integrated Level-Shifter and Memory Clock
Patent:
10,706,916 →
Application:
16/374,666 →
Method and Apparatus for Operating Programmable Clock Divider Using Reset Paths
Patent:
10,742,220 →
Application:
16/398,644 →
Method and Apparatus for Memory Noise-Free Wake-Up Protocol from Power-Down
Related Assignments
(20)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Nov 2, 2012
From: RAO, VENKATA N.S.N.
To: KOOL CHIP, INC.
Reel/Frame 029233/0615 →
Assignment of Assignor's Interest
Nov 5, 2012
From: RAO, VENKATA N.S.N.
To: KOOL CHIP, INC.
Reel/Frame 029242/0527 →
Assignment of Assignor's Interest
Mar 27, 2013
From: RAO, VENKATA N.S.N.
To: KOOL CHIP, INC.
Reel/Frame 030099/0236 →
Assignment of Assignor's Interest
Jun 20, 2013
From: RAO, VENKATA N.S.N.
To: KOOL CHIP, INC.
Reel/Frame 030651/0283 →
Assignment of Assignor's Interest
Jan 10, 2014
From: MISHRA, KISHORE; MOHANTY, PURNA C.; RAO, VENKATA N.S.N.
To: KOOL CHIP, INC.
Reel/Frame 031944/0497 →
Assignment of Assignor's Interest
Jan 10, 2014
From: CHALASANI, PRASAD; RAO, VENKATA N.S.N.
To: KOOL CHIP, INC.
Reel/Frame 031944/0210 →
Assignment of Assignor's Interest
Feb 3, 2014
From: RAO, VENKATA N.S.N.; CHALASANI, PRASAD
To: KOOL CHIP, INC.
Reel/Frame 032125/0293 →
Assignment of Assignor's Interest
Feb 4, 2014
From: CHALASANI, PRASAD; RAO, VENKATA N.S.N.
To: KOOL CHIP, INC.
Reel/Frame 032136/0807 →
Assignment of Assignor's Interest
Jan 28, 2015
From: RAO, VENKATA N.S.N.
To: INVECAS, INC.
Reel/Frame 034836/0464 →
Assignment of Assignor's Interest
Oct 13, 2015
From: KOOL CHIP, INC.
To: SOCTRONICS, INC.
Reel/Frame 036785/0762 →
Assignment of Assignor's Interest
Jan 27, 2016
From: BARTH, JOHN EDWARD, JR.
To: INVECAS, INC.
Reel/Frame 037602/0306 →
Assignment of Assignor's Interest
Jan 27, 2016
From: BARTH, JOHN EDWARD, JR.
To: INVECAS, INC.
Reel/Frame 037602/0312 →
Assignment of Assignor's Interest
Jan 27, 2016
From: BARTH, JOHN EDWARD, JR.
To: INVECAS, INC.
Reel/Frame 037602/0309 →
Assignment of Assignor's Interest
Feb 22, 2016
From: GORMAN, KEVIN W.; CHADWICK, THOMAS; PRATT, NANCY
To: INVECAS, INC.
Reel/Frame 037791/0477 →
Assignment of Assignor's Interest
Feb 22, 2016
From: GORMAN, KEVIN W.; CHADWICK, THOMAS; PRATT, NANCY
To: INVECAS, INC.
Reel/Frame 037791/0462 →
Assignment of Assignor's Interest
May 4, 2016
From: CHADWICK, THOMAS; GORMAN, KEVIN W.; PRATT, NANCY
To: INVECAS, INC.
Reel/Frame 038453/0947 →
Assignment of Assignor's Interest
Jun 17, 2016
From: PILO, HAROLD; POMICHTER, GERALD P.; LEE, MICHAEL; BARTH, JOHN EDWARD, JR.
To: INVECAS, INC.
Reel/Frame 039078/0218 →
Assignment of Assignor's Interest
Jun 27, 2016
From: CHALASANI, PRASAD; RAO, VENKATA N.S.N.
To: SOCTRONICS, INC.
Reel/Frame 039022/0469 →
Assignment of Assignor's Interest
May 13, 2019
From: CHALASANI, PRASAD; RAO, VENKATA N.S.N.; KANTAMANI, RAVINDRA
To: INVECAS, INC
Reel/Frame 049163/0814 →
Assignment of Assignor's Interest
May 20, 2019
From: SOCTRONICS, INC.
To: INVECAS, INC.
Reel/Frame 049233/0278 →