Patent Assignment
Reel/Frame 044283/0396
Assignment of Assignor's Interest
Recorded: 2017-12-04
Pages: 7
Assignors
HONG, YANG
Executed: 2017-12-04
OSTERMAYR, MARTIN
Executed: 2015-12-15
BOUJAMAA, EL MEHDI
Executed: 2015-12-14
Assignee
INTEL IP CORPORATION
2200 MISSION COLLEGE BLVD, SANTA CLARA, CALIFORNIA, 95054
Covered Property
(1)
Memory Circuit and Method for Operating a First and a Second Set of Memory Cells in Direct Memory Access Mode with Refresh
Related Assignments
(5)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest
Jan 22, 2016
From: HONG, YANG GEORGE; OSTERMAYR, MARTIN; BOUJAMAA, EL MEHDI
To: INTEL CORPORATION
Reel/Frame 037560/0100 →
Assignment of Assignor's Interest
Jan 22, 2016
From: HONG, YANG GEORGE; OSTERMAYR, MARTIN; BOUJAMAA, EL MEHDI
To: INTEL CORPORATION
Reel/Frame 037560/0182 →
Assignment of Assignor's Interest
Jun 9, 2021
From: INTEL IP CORPORATION
To: INTEL CORPORATION
Reel/Frame 057254/0415 →
Assignment of Assignor's Interest
Aug 2, 2021
From: INTEL IP CORPORATION
To: INTEL CORPORATION
Reel/Frame 057060/0577 →
Assignment of Assignor's Interest
Aug 15, 2022
From: INTEL CORPORATION
To: TAHOE RESEARCH, LTD.
Reel/Frame 061175/0176 →