Patent Assignment
Reel/Frame 045076/0061
Assignment of Assignor's Interest
Recorded: 2018-03-01
Pages: 4
Assignors
CHEN, YEN-TING
Executed: 2018-01-12
LEE, WEI-YANG
Executed: 2018-01-12
YANG, FENG-CHENG
Executed: 2018-01-12
CHEN, YEN-MING
Executed: 2018-01-12
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
8, LI-HSIN RD. 6, HSINCHU SCIENCE PARK, HSINCHU, 300-78, TAIWAN
Covered Property
(1)
Method of Forming Integrated Circuit with Low-K Sidewall Spacers for Gate Stacks