Method of forming integrated circuit with low-k sidewall spacers for gate stacks

1. A method comprising:

receiving a workpiece that includes a substrate and a gate stack disposed upon the substrate;

forming a spacer on a side surface of the gate stack;

curing the spacer to form a cured spacer having a plurality of voids from the curing, wherein the cured spacer includes a spacer layer with a low-k dielectric material, the low-k dielectric material is a material having a dielectric constant of 1 to less than 3.9, wherein the low-k dielectric material includes a dielectric material and a dopant selected from the group consisting of an n-type dopant and a p-type dopant;

forming a source/drain region in the substrate; and

forming a source/drain contact coupled to the source/drain region, wherein the spacer layer of the cured spacer is disposed between the source/drain contact and the gate stack.

2. The method of claim 1 , wherein the low-k dielectric material includes a porous low-k dielectric material.

3. The method of claim 2 , wherein the forming of the spacer includes depositing a low-k dielectric material precursor and a porogen; and

wherein the curing of the spacer to from the cured spacer includes curing the low-k dielectric material precursor to form the low-k dielectric material of the spacer layer.

4. The method of claim 3 , wherein:

the received gate stack includes a placeholder gate electrode; and

the curing of the low-k dielectric material precursor is performed after removing the placeholder gate electrode and before forming a functional gate electrode of the gate stack.

5. The method of claim 3 , wherein the curing of the low-k dielectric material precursor includes applying ultra-violet radiation to the workpiece.

6. The method of claim 1 , wherein the forming of the spacer includes:

depositing the dielectric material on the gate stack; and

in situ implanting the dopant during the depositing of the dielectric material.

7. The method of claim 1 , wherein the forming of the spacer includes:

depositing the dielectric material on the gate stack; and

thereafter performing an ion implantation process upon the workpiece to implant the dopant within the dielectric material.

8. The method of claim 1 , wherein the curing of the spacer to form the cured spacer includes heating the workpiece to a temperature between 350° C. and 450° C., and

wherein the curing occurs in an environment selected from the group consisting of an inert-gas environment and a vacuum environment.

9. The method of claim 1 , wherein the curing of the spacer includes exposing the spacer to radiation having one or more wavelengths between 150 nm and 250 nm for between 50 and 150 seconds.

10. A method comprising:

receiving a substrate and a gate stack disposed on the substrate;

forming a sidewall spacer on a vertical side surface of the gate stack, wherein the sidewall spacer includes a low-k dielectric precursor, wherein the low-k dielectric precursor includes a dielectric material selected from the group consisting of a semiconductor oxide, a semiconductor nitride, a semiconductor oxynitride, a semiconductor carbide, and a semiconductor oxycarbonitride;

curing the sidewall spacer to form a cured sidewall spacer, wherein the curing of the sidewall spacer includes curing the low-k dielectric precursor to form a low-k dielectric material of the cured sidewall spacer, wherein the curing forms a void within the low-k dielectric material, wherein the low-k dielectric material is a material having a dielectric constant of 1 to less than 3.9;

forming a source/drain contact adjacent the gate stack such that the cured sidewall spacer is disposed between the source/drain contact and the gate stack;

removing a placeholder gate electrode from the gate stack; and

forming a functional gate electrode of the gate stack, and

wherein the curing of the low-k dielectric precursor is performed after the removing of the placeholder gate electrode and prior to the forming of the functional gate electrode.

11. The method of claim 10 , wherein the sidewall spacer further includes a porogen, and

wherein the curing of the low-k dielectric precursor causes the porogen of the sidewall spacer to form the void within the low-k dielectric material, and the porogen remains within the cured sidewall spacer after the curing.

12. The method of claim 10 , further comprising forming a contact etch-stop layer directly on the sidewall spacer.

13. The method of claim 12 , wherein after the curing of the sidewall spacer to form the cured sidewall spacer, the contact etch-stop layer physically contacts the cured sidewall spacer, and

wherein after the forming of the source/drain contact, the contact etch-stop layer physically contacts the source/drain contact.

14. A method comprising:

forming a gate stack over a substrate;

forming a sidewall spacer on the gate stack;

curing the sidewall spacer to form a cured sidewall spacer having a plurality of voids from the curing, wherein the cured sidewall spacer is formed of a low-k dielectric material, wherein the low-k dielectric material is a material having a dielectric constant of 1 to less than 3.9, wherein the low-k dielectric material includes a dielectric material and a dopant selected from the group consisting of an n-type dopant and a p-type dopant; and

after curing the sidewall spacer, forming a source/drain contact adjacent the gate stack such that the cured sidewall spacer is disposed between the source/drain contact and the gate stack.

15. The method of claim 14 , wherein the sidewall spacer is formed of a low-k dielectric material precursor and a porogen,

wherein the low-k dielectric material precursor includes a material selected from the group consisting of tetraethylorthosilicate (TEOS), tetramethoxysilane (TMOS), methyltrimethoxysilane (MTMS), methyltriethoxysilane (MTES), and diethoxy methyl silane (DEMS), and

wherein the porogen is selected from the group consisting of α-Terpinene (ATRP) and polystyrene.

16. The method of claim 14 , wherein the sidewall spacer includes a low-k precursor material having a dopant selected from the group consisting of B, BF 2 , P and As, and

wherein the low-k precursor material has a concentration of the dopant between 1×10 16 atoms/cm 3 and 1×10 21 atoms/cm 3 .

17. The method of claim 14 , further comprising performing a dopant activation process to activate the dopant, and

wherein the substrate is part of a workpiece,

wherein the dopant activation process includes heating the workpiece to a temperature between 450° C. and 1050° C., and

wherein the dopant activation process occurs either prior to the curing of the sidewall spacer to form the cured sidewall spacer or during the curing of the sidewall spacer to form the cured sidewall spacer.

18. The method of claim 14 , wherein the sidewall spacer includes a low-k dielectric precursor, and

wherein the curing of the sidewall spacer includes curing the low-k dielectric precursor to form the low-k dielectric material of the cured sidewall spacer, and

wherein the low-k dielectric precursor includes a dielectric material selected from the group consisting of a semiconductor oxide, a semiconductor nitride, a semiconductor oxynitride, a semiconductor carbide, and a semiconductor oxycarbonitride.

19. The method of claim 14 , wherein the dopant is selected from the group consisting of B, BF 2 , P and As.

20. The method of claim 14 , further comprising removing a first gate electrode from the gate stack, and

wherein the curing of the sidewall spacer to form the cured sidewall spacer occurs after the removing of the first gate electrode, and

wherein the forming of the second gate electrode of the gate stack occurs after the curing of the sidewall spacer.