IP Library Assignment 046182/0545
Patent Assignment
Reel/Frame 046182/0545

Assignment of Assignor's Interest

Recorded: 2018-06-22 Pages: 6
Assignor
MAGNACHIP SEMICONDUCTOR, LTD.
Executed: 2018-06-22
Assignee
CARTHAGE SILICON INNOVATIONS LLC
8105 RASOR BOULEVARD, SUITE 210, PLANO, TEXAS, 75024
Covered Properties (9)
Charge Pump Circuit for Memory Device
Patent: 6,011,743 →
Application: 09/131,384 →
Interbus Data Flow Control System for Realigning Data by Byte Swapping and Byte Sampling
Patent: 6,141,716 →
Application: 09/141,578 →
Digital Delay-Locked Loop
Patent: 6,150,859 →
Application: 09/201,716 →
Method for Transmitting Data Between a Microprocessor and an External Memory Module by Using Combined Serial/Parallel Process
Patent: 6,339,800 →
Application: 09/223,386 →
Device and Method for Varying Bit Line Precharge Voltage in Semiconductor Memory
Patent: 6,084,812 →
Application: 09/296,492 →
Inverter for high voltage full swing output
Patent: 6,262,601 →
Application: 09/484,040 →
Structure and Method of Stacking Multiple Semiconductor Substrates of a Composite Semiconductor Device
Patent: 6,774,477 →
Application: 10/331,023 →
Publication: US 2004/0032017
Method of Forming Copper Wiring in Semiconductor Device
Patent: 7,087,524 →
Application: 10/720,849 →
Publication: US 2005/0009331
Method of Fabricating Vertical Channel Semiconductor Device
Patent: 7,910,437 →
Application: 12/912,558 →
Related Assignments (1)
Other recorded transfers of the patents in this record — the chain of ownership.
Corrective Assignment to Correct the Receiving Party Address Previously Recorded at Reel: 024563 Frame: 0807. Assignor(S) Hereby Confirms the Release by Secured Party. Nov 25, 2014
From: US BANK NATIONAL ASSOCIATION
To: MAGNACHIP SEMICONDUCTOR LTD.
Reel/Frame 034469/0001 →