IP Library Assignment 048271/0649
Patent Assignment
Reel/Frame 048271/0649

Assignment of Assignor's Interest

Recorded: 2019-02-07 Pages: 3
Assignors
XU, CHAO
Executed: 2018-04-05
RAGHAVAN, GOPAL
Executed: 2018-04-06
MELTON, BEN WILEY
Executed: 2018-04-09
WIJAYASEKARA, VIDURA MANU
Executed: 2018-04-06
COPE, BRYAN GARNETT
Executed: 2018-04-06
BAKER, DAVID CURETON
Executed: 2018-04-05
HAVLICEK, JOHN WHITAKER
Executed: 2018-04-05
Assignee
ETA COMPUTE, INC.
310 N. WESTLAKE BLVD., SUITE 110, WESTLAKE VILLAGE, CALIFORNIA, 91362
Covered Property (1)
Self-Timed Processors Implemented with Multi-Rail Null Convention Logic and Unate Gates
Application: 16/270,323 →
Publication: US 2019/0190520
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Jan 24, 2024
From: ETA COMPUTE, INC.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 066232/0020 →