Patent Assignment
Reel/Frame 049758/0773
Assignment of Assignor's Interest
Recorded: 2019-07-15
Pages: 2
Assignors
LI, CHIEN-HSING
Executed: 2019-07-03
CHIANG, TING-WEI
Executed: 2019-07-03
YANG, JUNG-CHAN
Executed: 2019-07-03
CHEN, TING-YU
Executed: 2019-07-03
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
NO. 8, LI-HSIN RD. VI, HSINCHU SCIENCE PARK, HSINCHU, 300, TAIWAN
Covered Property
(1)
Method of Designing an Integrated Circuit and Integrated Circuit