IP Library Assignment 050016/0594
Patent Assignment
Reel/Frame 050016/0594

Assignment of Assignor's Interest

Recorded: 2019-08-09 Pages: 6
Assignors
ANDERS, MARK
Executed: 2019-08-05
KAUL, HIMANSHU
Executed: 2019-08-05
KRISHNAMURTHY, RAM
Executed: 2019-08-05
LIN, KEVIN LAI
Executed: 2019-08-06
KOBRINSKY, MAURO
Executed: 2019-08-05
Assignee
INTEL CORPORATION
2200 MISSION COLLEGE BOULEVARD, SANTA CLARA, CALIFORNIA, 95054
Covered Property (1)
Place-And-Route Resistance and Capacitance Optimization Using Multi-Height Interconnect Trenches and Air Gap Dielectrics
Application: 16/534,104 →
Publication: US 2021/0043567
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Sep 11, 2025
From: INTEL CORPORATION
To: SK HYNIX NAND PRODUCT SOLUTIONS CORP. (DBA SOLIDIGM)
Reel/Frame 072549/0289 →