IP Library Assignment 050959/0642
Patent Assignment
Reel/Frame 050959/0642

Assignment of Assignor's Interest

Recorded: 2019-11-08 Pages: 4
Assignors
CHEN, YEN-TING
Executed: 2018-01-12
LEE, WEI-YANG
Executed: 2018-01-12
YANG, FENG-CHENG
Executed: 2018-01-12
CHEN, YEN-MING
Executed: 2018-01-12
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
8, LI-HSIN RD. 6, HSINCHU SCIENCE PARK, HSINCHU, 300-78, TAIWAN
Covered Property (1)
Integrated Circuit with Doped Low-K Sidewall Spacers for Gate Stacks
Application: 16/678,472 →
Publication: US 2020/0075420