Patent Assignment
Reel/Frame 051115/0546
Assignment of Assignor's Interest
Recorded: 2019-11-26
Pages: 6
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
NO. 8, LI-HSIN RD. 6, HSIN-CHU SCIENCE PARK, HSIN-CHU, 300-77, TAIWAN
Covered Property
(1)
Boundary Design to Reduce Memory Array Edge Cmp Dishing Effect