Patent Assignment
Reel/Frame 051245/0690
Assignment of Assignor's Interest
Recorded: 2019-12-11
Pages: 8
Assignors
KAO, MIN-FENG
Executed: 2016-03-30
YAUNG, DUN-NIAN
Executed: 2016-03-30
LIU, JEN-CHENG
Executed: 2016-03-30
HUANG, HSUN-YING
Executed: 2016-04-08
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
NO. 8, LI-HSIN RD. 6, HSIN-CHU SCIENCE PARK, HSIN-CHU, 300-77, TAIWAN
Covered Property
(1)
Structure for Standard Logic Performance Improvement Having a Back-Side Through-Substrate-Via