Corrective Assignment to Correct the Omission of the 5TH Inventor's Name Previously Recorded at Reel: 051412 Frame: 0739. Assignor(S) Hereby Confirms the Assignment .

Recorded: 2020-01-09 Pages: 6

Assignors

LAI, PEI YING

Executed: 2019-10-18

HSU, CHIA-WEI

Executed: 2019-10-18

HOU, CHENG-HAO

Executed: 2019-10-18

YU, XIONG-FEI

Executed: 2019-12-27

CHUI, CHI ON

Executed: 2019-10-18

Assignee

8, LI-HSIN RD. 6 HSINCHU SCIENCE, HSINCHU, 300-78, TAIWAN

Covered Property (1)

Gate Structures in Semiconductor Devices

Patent: 11,756,832 →

Application: 16/733,959 →

Publication: US 2021/0098303

Related Assignments (1)

Other recorded transfers of the patent in this record — the chain of ownership.