IP Library Assignment 051632/0864
Patent Assignment
Reel/Frame 051632/0864

Assignment of Assignor's Interest

Recorded: 2020-01-27 Pages: 8
Assignor
Assignee
LIBERTY PATENTS LLC
2325 OAK ALLEY, TYLER, TEXAS, 75703
Covered Properties (25)
Translated Memory Protection Apparatus for an Advanced Microprocessor
Patent: 6,199,152 →
Application: 08/702,771 →
Method for Increasing the Speed of Speculative Execution
Patent: 6,748,589 →
Application: 09/421,484 →
Translated Memory Protection Apparatus for an Advanced Microprocessor
Patent: 7,840,776 →
Application: 09/699,947 →
Three dimensional integrated circuits
Application: 10/267,483 →
Publication: US 2004/0004239
Methods for fabricating three dimensional integrated circuits
Application: 10/267,484 →
Publication: US 2004/0018711
Insulated-gate field-effect thin film transistors
Application: 10/413,808 →
Publication: US 2004/0004251
Translated Memory Protection Apparatus for an Advanced Microprocessor
Patent: 7,716,452 →
Application: 10/438,158 →
Semiconductor switching devices
Application: 11/042,362 →
Publication: US 2005/0146942
Operating system for providing energy-conserving operating functions
Application: 11/183,604 →
Publication: US 2005/0268126
Mpga Products Based on a Prototype Fpga
Patent: 7,673,273 →
Application: 11/712,380 →
Publication: US 2007/0152708
Insulated-gate field-effect thin film transistors
Application: 11/985,829 →
Publication: US 2008/0067594
Method for Increasing the Speed of Speculative Execution
Patent: 8,650,555 →
Application: 12/037,853 →
Thin Film Transistors and Fabrication Methods
Application: 12/207,064 →
Publication: US 2009/0004788
Semiconductor Switching Devices and Fabrication Methods
Patent: 7,709,314 →
Application: 12/207,110 →
Publication: US 2009/0004791
Translated Memory Protection
Patent: 8,495,337 →
Application: 12/762,187 →
Publication: US 2010/0205413
Translated Memory Protection Apparatus for an Advanced Microprocessor
Patent: 8,719,544 →
Application: 13/243,943 →
Publication: US 2012/0110306
Method for Increasing the Speed of Speculative Execution
Application: 14/143,926 →
Publication: US 2014/0115305
Method for increasing the dynamic linearity performance of a DAC with a track and attenuate subcircuit
Application: 60/180,434 →
Integrated circuits containing transistors operable with two power supply voltages
Application: 60/224,650 →
Depopulated programmable logic array
Application: 60/231,059 →
Wire replaceable TFT SRAM cell and cell array technology
Application: 60/393,763 →
Wire replaceable thin film fuse and anti-fuse technology
Application: 60/397,070 →
Re-programmable ASIC
Application: 60/400,007 →
Thin film SRAM cell
Application: 60/402,573 →
SRAM cell and cell arrays
Application: 60/449,011 →
Related Assignments (5)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Nov 11, 2013
From: WHITE, THOMAS HENRY
To: YAKIMISHU CO., LTD., LLC
Reel/Frame 031578/0165 →
Assignment of Assignor's Interest Nov 25, 2013
From: SUARIS, PETER RAMYALAL
To: YAKIMISHU CO., LTD., LLC
Reel/Frame 031673/0261 →
Merger Sep 29, 2015
From: INTELLECTUAL VENTURE FUNDING LLC
To: INTELLECTUAL VENTURES HOLDING 81 LLC
Reel/Frame 036711/0160 →
Corrective Assignment to Correct the Assignor's Name Previously Recorded at Reel: 036711 Frame: 0160. Assignor(S) Hereby Confirms the Merger. Oct 6, 2015
From: INTELLECTUAL VENTURES FUNDING LLC
To: INTELLECTUAL VENTURES HOLDING 81 LLC
Reel/Frame 036797/0356 →
Patent Security Agreement May 1, 2023
From: RPX CORPORATION
To: BARINGS FINANCE LLC, AS COLLATERAL AGENT
Reel/Frame 063503/0742 →