IP Library Assignment 051746/0141
Patent Assignment
Reel/Frame 051746/0141

Assignment of Assignor's Interest

Recorded: 2020-02-06 Pages: 4
Assignors
WANG, SUNG-LI
Executed: 2020-01-17
LIANG, SHUEN-SHIN
Executed: 2020-01-17
PENG, YU-YUN
Executed: 2020-01-17
LEE, FANG-WEI
Executed: 2020-01-17
CHU, CHIA-HUNG
Executed: 2020-01-17
KHADERBAD, MRUNAL ABHIJITH
Executed: 2020-01-17
LIN, KENG-CHU
Executed: 2020-01-17
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
NO.8, LI-HSIN RD.6, SCIENCE-BASED INDUSTRIAL PARK, HSINCHU, 300, TAIWAN
Covered Property (1)
Method for Making Self-Aligned Barrier for Metal Vias In-Situ during a Metal Halide Pre-Clean and Associated Interconnect Structure
Application: 16/721,762 →
Publication: US 2021/0193511