Patent Assignment
Reel/Frame 052243/0131
Assignment of Assignor's Interest
Recorded: 2020-03-27
Pages: 6
Assignor
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
Executed: 2020-03-24
Assignee
TRENCHANT BLADE TECHNOLOGIES LLC
8105 RASOR BLVD SUITE 210, PLANO, TEXAS, 75024-0116
Covered Properties
(6)
Semiconductor-On-Insulator Chip Incorporating Partially-Depleted, Fully-Depleted, and Multiple-Gate Devices
Patent:
6,720,619 →
Application:
10/319,119 →
Method for Manufacturing Dual Damascene Structure with a Trench Formed First
Profile Confinement to Improve Transistor Performance
Vertical Flash Memory
Method for manufacturing dual damascene structure with a trench formed first
Application:
11/401,308 →
Publication:
US 2006/0194426
Design Techniques for Stacking Identical Memory Dies
Related Assignments
(5)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Oct 6, 2003
From: CHEN, HAO-YU; YAO, YEE-CHIA; YANG, FU-LIANG; HU, CHENNING
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 014555/0422 →
Assignment of Assignor's Interest
Sep 1, 2004
From: YANG, CHIN-TIEN; JOU, JUAN-JANN; LEE, YU-HUA; LAI, CHIA-HUNG
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO. LTD.
Reel/Frame 015099/0702 →
Assignment of Assignor's Interest
Apr 25, 2005
From: CHEN, CHIEN-HAO; NIEH, CHUN-FENG; MAI, KAREN; LEE, TZE-LIANG
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 016508/0160 →
Assignment of Assignor's Interest
Aug 29, 2005
From: YANG, SHIH-I
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 016940/0991 →
Assignment of Assignor's Interest
Apr 10, 2007
From: HSU, CHAO-SHUN; LIU, LOUIS; CHAO, CLINTON; PENG, MARK SHANE
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 019143/0897 →