Patent Assignment
Reel/Frame 052494/0797
Assignment of Assignor's Interest
Recorded: 2020-04-24
Pages: 5
Assignors
HUANG, MAO-LIN
Executed: 2020-04-06
CHU, LUNG-KUN
Executed: 2020-04-06
HSU, CHUNG-WEI
Executed: 2020-04-06
YU, JIA-NI
Executed: 2020-04-06
CHIANG, KUO-CHENG
Executed: 2020-04-06
WANG, CHIH-HAO
Executed: 2020-04-13
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
8, LI-HSIN RD. 6, HSINCHU SCIENCE PARK, HSINCHU, 300-78, TAIWAN
Covered Property
(1)
Gate Patterning Process for Multi-Gate Devices