Patent Assignment
Reel/Frame 054496/0287
Assignment of Assignor's Interest
Recorded: 2020-11-30
Pages: 3
Assignee
VERVESEMI MICROELECTRONICS PRIVATE LIMITED
TOWER 4, ARTHA SEZ, LOT-21, TECH ZONE-4, GREATER NOIDA, 201306, INDIA
Covered Property
(1)
System and Method for Background Calibration of Time Interleaved Adc