IP Library Assignment 055993/0478
Patent Assignment
Reel/Frame 055993/0478

Assignment of Assignor's Interest

Recorded: 2021-04-21 Pages: 5
Assignors
SU, HUAN-CHIEH
Executed: 2020-07-27
YU, LI-ZHEN
Executed: 2020-07-27
CHEN, CHUN-YUAN
Executed: 2020-07-27
CHUANG, CHENG-CHI
Executed: 2020-07-27
CHENG, KUAN-LUN
Executed: 2020-08-05
WANG, CHIH-HAO
Executed: 2020-08-05
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
8, LI-HSIN RD. 6, HSINCHU SCIENCE PARK, HSINCHU, 300-78, TAIWAN
Covered Property (1)
Method and Structure for Reducing Source/Drain Contact Resistance at Wafer Backside
Application: 17/236,675 →
Publication: US 2022/0344496