Assignment of Assignor's Interest

Recorded: 2021-04-26 Pages: 6

Assignors

YANG, XIAOJIAN

Executed: 2021-01-07

REVENU, FREDERIC

Executed: 2021-01-15

GAITONDE, DINESH D.

Executed: 2021-03-01

GUPTA, AMIT

Executed: 2021-04-25

Assignee

XILINX, INC.

2100 LOGIC DRIVE, SAN JOSE, CALIFORNIA, 95124

Covered Property (1)

Sub-Fpga Level Compilation Platform with Adjustable Dynamic Region for Emulation/Prototyping Designs

Patent: 11,681,846 →

Application: 17/147,163 →