Patent Assignment
Reel/Frame 060639/0036
Assignment of Assignor's Interest
Recorded: 2022-07-27
Pages: 12
Assignors
CHU, CHEN-LIANG
Executed: 2020-08-11
CHOU, CHIEN-CHIH
Executed: 2020-08-13
CHENG, CHIH-CHANG
Executed: 2020-08-13
CHEN, YI-HUAN
Executed: 2020-08-11
THEI, KONG-BENG
Executed: 2020-08-13
LEI, MING-TA
Executed: 2020-08-13
LIU, RUEY-HSIN
Executed: 2020-08-13
KUNG, TA-YUAN
Executed: 2020-08-11
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
NO. 8, LI-HSIN RD. 6, HSIN-CHU SCIENCE PARK, HSIN-CHU, 300-77, TAIWAN
Covered Property
(1)
Method of Forming a Transistor Device with a Gate Structure having a Pair of Recess Regions and a Resistive Protection Layer Within