IP Library › Assignment 062552/0702
Patent Assignment
Reel/Frame 062552/0702

Assignment of Assignor's Interest

Recorded: 2023-01-31 Pages: 4
Assignor
RICOH COMPANY, LTD.
Executed: 2023-01-27
Assignee
SEMICONDUCTOR DESIGN TECHNOLOGIES LLC
1000 N. WEST STREET, SUITE 1200, WILMINGTON, DELAWARE, 19801
Covered Properties (6)
Assertion Generating System, Program Thereof, Circuit Verifying System, and Assertion Generating Method
Patent: 7,603,636 →
Application: 10/579,766 →
Publication: US 2008/0104556
Method and Apparatus for Simulating Logic Circuits That Include a Circuit Block to Which Power Is Not Supplied
Patent: 7,310,795 →
Application: 11/179,660 →
Publication: US 2006/0015312
Method and System of Program Development Supporting
Patent: 8,239,834 →
Application: 11/414,397 →
Publication: US 2006/0248505
Semiconductor Design Support Device, Semiconductor Design Support Method, and Manufacturing Method for Semiconductor Integrated Circuit
Patent: 7,971,167 →
Application: 12/032,117 →
Publication: US 2008/0201673
Method and Apparatus for Simulating Logic Circuits That Include a Circuit Block to Which Power Is Not Supplied
Patent: 43,623 →
Application: 12/640,904 →
Semiconductor Design Support Apparatus
Patent: 8,701,061 →
Application: 13/034,971 →
Publication: US 2011/0214098
Related Assignments (5)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Jul 13, 2005
From: TSUKAMOTO, YASUTAKA
To: RICOH COMPANY, LTD.
Reel/Frame 016775/0301 →
Assignment of Assignor's Interest May 18, 2006
From: YAMADA, TAKAMITSU
To: RICOH COMPANY, LTD.
Reel/Frame 017909/0731 →
Assignment of Assignor's Interest Jun 28, 2006
From: TSUKAMOTO, YASUTAKA
To: RICOH COMPANY, LTD.
Reel/Frame 018018/0246 →
Assignment of Assignor's Interest Feb 15, 2008
From: TSUKAMOTO, YASUTAKA
To: RICOH COMPANY, LTD.
Reel/Frame 020517/0185 →
Assignment of Assignor's Interest Feb 25, 2011
From: TSUKAMOTO, YASUTAKA
To: RICOH COMPANY, LTD.
Reel/Frame 025851/0392 →