Patent Assignment
Reel/Frame 062714/0157
Assignment of Assignor's Interest
Recorded: 2023-02-16
Pages: 6
Assignors
JEONG, JIN HO
Executed: 2023-02-13
CHUNG, HOIJU
Executed: 2023-02-15
KIM, DAE SUK
Executed: 2023-02-13
JANG, MUNSEON
Executed: 2023-02-13
Assignee
SK HYNIX INC.
2091, GYEONGCHUNG-DAERO, BUBAL-EUB, ICHEON-SI, GYEONGGI-DO, KOREA, REPUBLIC OF
Covered Property
(1)
Error Processing Circuit, Memory and Operation Method of the Memory