Patent Assignment
Reel/Frame 066171/0288
Assignment of Assignor's Interest
Recorded: 2024-01-02
Pages: 26
Assignors
JORET, SIMON
Executed: 2023-11-14
BERAUD-SUDREAU, QUENTIN
Executed: 2023-10-16
LAUBE, RÉMI
Executed: 2023-10-20
BREYSSE, STÉPHANE
Executed: 2023-11-21
MARTIN, MATTHIEU
Executed: 2023-11-22
COCHARD, JULIEN
Executed: 2023-11-06
Assignee
TELEDYNE E2V SEMICONDUCTORS SAS
AVENUE DE ROCHEPLEINE, SAINT EGREVE, AVENUE DE ROCHE, FRANCE
Covered Property
(1)
Method for Determining the Phase Difference Between a First Clock Signal Received by a First Electronic Component and a Second Clock Signal Received by a Second Electronic Component