IP Library Granted Patent US 11,355,452
Granted Patent B2
US 11,355,452 · App. 17/068,482 · Granted Jun 7, 2022

EMI shielding for flip chip package with exposed die backside

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Quick Facts
Patent No.
US 11,355,452
App. No.
17/068,482
Filed
Oct 12, 2020
Granted
Jun 7, 2022
Kind
B2
Art Unit
2897
USPC
257/659
Abstract

A semiconductor device has a substrate and a semiconductor die disposed over the substrate. An encapsulant is deposited over the semiconductor die and substrate with a surface of the semiconductor die exposed from the encapsulant. A first shielding layer is formed over the semiconductor die. In some embodiments, the first shielding layer includes a stainless steel layer in contact with the surface of the semiconductor die and a copper layer formed over the stainless steel layer. The first shielding layer may further include a protective layer formed over the copper layer. One embodiment has a heatsink bonded to the semiconductor die through a solder layer. A second shielding layer can be formed over a side surface of the semiconductor die.

Claims (49)

1. A semiconductor device, comprising:

a substrate;

a semiconductor die disposed over the substrate;

an encapsulant deposited over the semiconductor die and substrate with a surface of the semiconductor die exposed from the encapsulant;

a stainless steel layer formed over the encapsulant semiconductor die, and a side surface of the substrate;

a copper layer formed over the stainless steel layer;

a solder layer formed over the copper layer; and

a heat spreader disposed over the solder layer.

2. The semiconductor device of claim 1 , further including an underfill disposed between the substrate and semiconductor die.

3. The semiconductor device of claim 1 , wherein a thickness of the stainless steel layer is between 0.1 and 0.3 micrometers.

4. The semiconductor device of claim 3 , wherein a thickness of the copper layer is between 5.4 and 6.6 micrometers.

5. The semiconductor device of claim 1 , wherein the solder layer comprises solder paste.

6. The semiconductor device of claim 1 , wherein the heat spreader is bonded to the semiconductor die through the solder layer.

7. A semiconductor device, comprising:

a semiconductor die;

a solder paste disposed over the semiconductor die;

a copper layer disposed between the solder paste and semiconductor die; a conductive protection layer formed over the copper layer

a stainless steel layer disposed between the copper layer and semiconductor die; and

a heat spreader disposed over the solder paste.

8. The semiconductor device of claim 7 , wherein a thickness of the copper layer is between 5.4 and 6.6 micrometers and a thickness of the stainless steel layer is between 0.1 and 0.3 micrometers.

9. The semiconductor device of claim 7 , further including an encapsulant deposited around the semiconductor die.

10. The semiconductor device of claim 7 , wherein the heat spreader is bonded to the semiconductor die by the solder paste.

11. A method of making a semiconductor device, comprising:

providing a semiconductor die;

depositing an encapsulant over the semiconductor die;

forming a stainless steel layer over the semiconductor die and encapsulant after depositing the encapsulant;

forming a copper layer over the stainless steel layer after forming the stainless steel layer, wherein the stainless steel layer is disposed between the copper layer and semiconductor die; forming a conductive protection layer over the copper layer;

forming a solder layer over the conductive protection layer after forming the conductive protection layer; and

attaching a heat spreader to the semiconductor die and encapsulant using the solder layer.

12. The method of claim 11 , further including disposing the semiconductor die over a substrate.

13. The method of claim 12 , further including disposing an underfill between the substrate and semiconductor die.

14. The method of claim 11 , further including forming the solder layer using a solder paste.

15. The method of claim 11 , wherein a thickness of the stainless steel layer is between 0.1 and 0.3 micrometers.

16. The method of claim 11 , wherein a thickness of the copper layer is between 5.4 and 6.6 micrometers.

17. A method of making a semiconductor device, comprising:

providing a substrate;

disposing a semiconductor die over the substrate;

depositing an encapsulant over the semiconductor die and substrate with a surface of the semiconductor die exposed from the encapsulant;

forming a stainless steel layer over the encapsulant and semiconductor die

forming a copper layer over the stainless steel layer; forming a conductive protection layer over the copper layer;

forming a solder layer over the conductive protection layer; and

disposing a heat spreader over the solder layer.

18. The method of claim 17 , further including disposing an underfill between the substrate and semiconductor die.

19. The method of claim 17 , wherein a thickness of the stainless steel layer is between 0.1 and 0.3 micrometers.

20. The method of claim 19 , wherein a thickness of the copper layer is between 5.4 and 6.6 micrometers.

21. The method of claim 17 , further including forming the solder layer using a solder paste.

22. The method of claim 17 , further including bonding the heat spreader to the semiconductor die using the solder layer.

23. The method of claim 17 , further including forming the stainless steel layer by sputtering.

24. The method of claim 17 , further including forming the copper layer by sputtering.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 1ST INVENTOR'S EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 054030 FRAME: 0432. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT . Recorded Sep 1, 2022
From: SON, DONG WON; SHIN, JONG HO; LIM, SUNG JAE; CHOI, SUNG HO; KIM, BYEONGHOON; KIM, CHANGOH; CHO, SUNGWON; PARK, KYOUNGHEE
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 061369/0746 →