IP Library Granted Patent US 11,417,598
Granted Patent B2
US 11,417,598 · App. 16/853,073 · Granted Aug 16, 2022

Semiconductor package and related methods

Inventors: Yusheng Lin (Phoenix, AZ); Yenting Wen (Chandler, AZ); George Chang (Tempe, AZ)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H01L23/528H01L21/304H01L21/50H01L21/78H01L23/36H01L23/492H01L23/5228H01L23/53228
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Quick Facts
Patent No.
US 11,417,598
App. No.
16/853,073
Filed
Apr 20, 2020
Granted
Aug 16, 2022
Kind
B2
Art Unit
2895
USPC
257/762
Abstract

Implementations of semiconductor packages may include: a prefabricated electrically conductive section; two or more metal oxide semiconductor field effect transistors (MOSFET) physically coupled together; and a back metal coupled to the two or more MOSFETs; wherein the electrically conductive section may be coupled to the back metal and may be configured to electrically couple the two or more MOSFETs together during operation of the two or more MOSFETs.

Claims (35)

1. A semiconductor package comprising:

a prefabricated copper slab;

two or more metal oxide semiconductor field effect transistors (MOSFET) comprised in a same semiconductor die; and

a back metal coupled to the two or more MOSFETs;

wherein the prefabricated copper slab is coupled directly to the back metal and is configured to electrically couple the two or more MOSFETs together during operation of the two or more MOSFETs; and

wherein the prefabricated copper slab comprises an outer perimeter that is smaller than an outer perimeter of the same semiconductor die.

2. The semiconductor package of claim 1 , wherein an on-resistance of the two or more MOSFETs is reduced through the coupling of the prefabricated copper slab to the back metal.

3. The semiconductor package of claim 1 , wherein the prefabricated copper slab is not formed as part of the back metal during processing.

4. The semiconductor package of claim 1 , wherein a thickness of the prefabricated copper slab is between 25 microns to 125 microns.

5. The semiconductor package of claim 1 , wherein a thickness of the prefabricated copper slab is between 120 microns to 200 microns.

6. The semiconductor package of claim 1 , wherein the prefabricated copper slab is coupled to the back metal using one of a silver sintering paste, solder, electrically conductive epoxy, and any combination thereof.

7. The semiconductor package of claim 1 , wherein the back metal comprises a titanium, nickel and silver alloy.

8. A semiconductor package comprising:

a prefabricated copper section;

two or more metal oxide semiconductor field effect transistors (MOSFET) comprised in a same semiconductor die; and

a back metal coupled to the two or more MOSFETs;

wherein the prefabricated copper section is coupled directly to the back metal and is configured to electrically couple the two or more MOSFETs together during operation of the two or more MOSFETs; and

wherein the prefabricated copper section comprises an outer perimeter that is smaller than an outer perimeter of the back metal.

9. The semiconductor package of claim 8 , wherein an on-resistance of the two or more MOSFETs is reduced through the coupling of the prefabricated copper section to the back metal.

10. The semiconductor package of claim 8 , wherein the prefabricated copper section is not formed as part of the back metal during processing.

11. The semiconductor package of claim 8 , wherein a thickness of the prefabricated copper section is between 25 microns to 125 microns.

12. The semiconductor package of claim 8 , wherein a thickness of the prefabricated copper section is between 120 microns to 200 microns.

13. The semiconductor package of claim 8 , wherein the prefabricated copper section is coupled to the back metal using one of a silver sintering paste, solder, electrically conductive epoxy, and any combination thereof.

14. The semiconductor package of claim 8 , wherein the back metal comprises a titanium, nickel and silver alloy.

15. A semiconductor package comprising:

one of a prefabricated aluminum slab or a prefabricated aluminum section;

two or more metal oxide semiconductor field effect transistors (MOSFET) comprised in a same semiconductor die; and

a back metal coupled to the two or more MOSFETs;

wherein the one of the prefabricated aluminum slab or the prefabricated aluminum section is coupled directly to the back metal and is configured to electrically couple the two or more MOSFETs together during operation of the two or more MOSFETs; and

wherein the one of the prefabricated aluminum slab or the prefabricated aluminum section comprises an outer perimeter that is smaller than an outer perimeter of the same semiconductor die.

16. The semiconductor package of claim 15 , wherein an on-resistance of the two or more MOSFETs is reduced through the coupling of one of the prefabricated aluminum slab or the prefabricated aluminum section to the back metal.

17. The semiconductor package of claim 15 , wherein a thickness of the one of the prefabricated aluminum slab or the prefabricated aluminum section is between 25 microns to 125 microns.

18. The semiconductor package of claim 15 , wherein a thickness of the one of the prefabricated aluminum slab or the prefabricated aluminum section is between 120 microns to 200 microns.

19. The semiconductor package of claim 15 , wherein the one of the prefabricated aluminum slab or the prefabricated aluminum section is coupled to the back metal using one of a silver sintering paste, solder, electrically conductive epoxy, and any combination thereof.

20. The semiconductor package of claim 15 , wherein the back metal comprises a titanium, nickel and silver alloy.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL 053613, FRAME 0621 Recorded Aug 17, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064618/0942 →
SECURITY INTEREST Recorded Aug 27, 2020
From: FAIRCHILD SEMICONDUCTOR CORPORATION; SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 053613/0621 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 20, 2020
From: LIN, YUSHENG; WEN, YENTING; CHANG, GEORGE
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 052443/0367 →