IP Library Granted Patent US 7,215,344
Granted Patent B2
US 7,215,344 · App. 09/133,741 · Granted May 8, 2007

Triangle clipping for 3D graphics

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Quick Facts
Patent No.
US 7,215,344
App. No.
09/133,741
Granted
May 8, 2007
Kind
B2
Abstract

A geometry and lighting graphics accelerator with an improved clipping process. Clipping is performed prior to any calculation or evaluation of primitives for lighting, texture, fog, or color. Barycentric coordinates are used to define all vertices: original, intermediate, and final intersection points. Use of barycentric coordinates results in less storage space. A circular buffer is used during the clipping process to store input and output polygons. Use of the circular buffer also results is reduced storage requirements.

Claims (43)

1. A method for clipping graphics primitives for display, comprising the steps of:

performing a clipping algorithm which uses only a single circular buffer to store input and output vertices of a primitive; and

for each one of said vertices, indicating whether said one of said vertices is visible with respect to each plane of a view volume.

2. The method of claim 1 , wherein only vertices which are visible in all said planes are rasterized.

3. The method of claim 1 , wherein said performing step is executed prior to any lighting, fog, or texture calculations.

4. The method of claim 1 , wherein said view volume is a frustrum.

5. The method of claim 1 , wherein there are six or more planes in said view volume.

6. The method of claim 1 , wherein there are six planes in said view volume.

7. The method of claim 1 , wherein there are twelve planes in said view volume.

8. The method of claim 1 , wherein said clipping algorithm is the Sutherland and Hodgman polygon clipping algorithm.

9. The method of claim 1 , wherein vertex visibility in each of said planes is indicated by a bit flag.

10. The method of claim 1 , wherein vertex visibility is indicated by twelve bit code.

11. The method of claim 1 , wherein two circular buffers are used to store said input and output polygons.

12. The method of claim 1 , wherein said circular buffer has a maximum storage of sixteen vertices.

13. The method of claim 1 , further comprising defining all said vertices of said primitive using relational coordinates.

14. A geometry unit, comprising:

circuitry to define all vertices of a primitive using relational coordinates;

circuitry to implement a clipping algorithm which uses only a single circular buffer to store input and output vertices of a primitive; and

circuitry to set an outcode value for each of said vertices indicating whether it is visible with respect to individual planes of said view volume.

15. The geometry unit of claim 14 , wherein only vertices which are visible in all said planes are rasterized.

16. The geometry unit of claim 14 , wherein said clipping algorithm is implemented prior to any lighting, fog, or texture calculations.

17. The geometry unit of claim 14 , wherein said primitive is a triangle.

18. The geometry unit of claim 14 , wherein said relational coordinates are barycentric.

19. The geometry unit of claim 14 , wherein said view volume is a frustrum.

20. The geometry unit of claim 14 , wherein there are six or more planes in said view volume.

21. The geometry unit of claim 14 , wherein said clipping algorithm is the Sutherland and Hodgman polygon clipping algorithm.

22. The geometry unit of claim 14 , wherein vertex visibility in each of said planes is indicated by a bit flag.

23. The geometry unit of claim 14 , wherein two circular buffers are used to store said input and output polygons.

24. The geometry unit of claim 14 , wherein said circular buffer has a maximum storage of sixteen vertices.

25. A computer system comprising:

display hardware;

a processor connected to provide graphics data;

a geometry and lighting accelerator connected to receive said graphics data, said geometry and lighting accelerator comprising

a transformation unit connected to transform a primitive into a clipping space, and

a geometry unit connected to perform clip testing on said primitives, clip said primitives, if necessary,

set an outcode value for each said vertex indicating whether it is visible with respect to each plane of a view volume, and

output clipped graphics data to be rendered; and

video rendering hardware connected to receive said clipped graphics data and to generate graphics, and connected to display said graphics on said display hardware;

wherein said geometry unit uses only a single circular buffer to store input and output vertices of said primitive.

26. The computer system of claim 25 , wherein said clipping is implemented prior to any lighting, fog, or texture calculations.

27. The computer system of claim 25 , wherein said primitive is a triangle.

28. The computer system of claim 25 , wherein said clipping uses the Sutherland and Hodgman polygon clipping algorithm.

29. The computer system of claim 25 , wherein vertex visibility in each of said planes is indicated by a bit flag.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 19, 2019
From: ZIILABS INC., LTD
To: RPX CORPORATION
Reel/Frame 048947/0592 →
CHANGE OF NAME Recorded Apr 1, 2014
From: 3DLABS INC., LTD.
To: ZIILABS INC., LTD.
Reel/Frame 032588/0125 →