IP Library Granted Patent US 7,240,342
Granted Patent B1
US 7,240,342 · App. 09/608,616 · Granted Jul 3, 2007

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Quick Facts
Patent No.
US 7,240,342
App. No.
09/608,616
Granted
Jul 3, 2007
Kind
B1
Abstract

According to one embodiment, systems, apparatus and methods are disclosed for installing a program onto a target machine, executing the program, and responsive to a change in profile data collected while the program executes which exceeds a predetermined threshold, recompiling the program while the target machine is idle.

Claims (48)

1. A method comprising:

installing an intermediate representation on a target machine;

generating and running executable code from the intermediate representation;

collecting profile data including collecting details of a hardware configuration of the target machine and sampling the running of the executable code at a controlled rate;

processing the profile data when a CPU of the target machine is idle; and

recompiling the intermediate representation based on the processed profile data, wherein recompiling comprises using annotations to relate locations in the executable code to the profile data and the intermediate representation, wherein each annotation includes a compiler optimization phase in which the annotation was created.

2. The method of claim 1 , wherein said processing the profile data comprises generating one or more profiles.

3. The method of claim 2 , wherein said generating the one or more profiles comprises:

generation of a binary level profile from analysis of the profile data; and

derivation of a profile at high level intermediate language from the binary level profile.

4. The method of claim 1 , wherein collecting the details of the hardware configuration of the target machine is performed during installing of the intermediate representation.

5. The method of claim 1 , wherein the hardware configuration includes details of a processor type.

6. The method of claim 1 , wherein the hardware configuration includes details of a cache configuration.

7. The method of claim 1 , wherein said recompiling is performed by an operating system of the target machine.

8. The method of claim 1 , wherein the annotations are implemented as a linked list of data structures.

9. The method of claim 1 , wherein an annotation maps a binary level instruction to a source level token.

10. The method of claim 1 , wherein an annotation describes how a binary level instruction evolved from a corresponding high level instruction in a prior compilation.

11. A computer readable medium having stored thereon data representing instructions that when executed cause a processor to:

generate and run executable code from an intermediate representation installed on a target machine having the processor;

collect profile data including collecting details of a hardware configuration of the target machine and sampling the running of the executable code;

process the profile data; and

recompile the intermediate representation based on the processed profile data, wherein recompiling comprises using annotations to relate locations in the executable code to the profile data and the intermediate representation, wherein each annotation includes a compiler optimization phase in which the annotation was created.

12. The computer readable medium of claim 11 , wherein the data further comprises data representing instructions that when executed cause the processor to:

generate one or more profiles.

13. The computer readable medium of claim 11 , wherein the data further comprises data representing instructions that when executed cause the processor to:

generate a binary level profile from analysis of the profile data; and

derive a profile at high level intermediate language from the binary level profile.

14. The computer readable medium of claim 11 , wherein collecting the details of the hardware configuration of the target machine is performed during installing of the intermediate representation.

15. The computer readable medium of claim 11 , wherein the hardware configuration includes details of a processor type.

16. The method of claim 11 , wherein said recompiling ling is performed by an operating system of the target machine.

17. The method of claim 11 , wherein the annotations are implemented as a linked list of data structures.

18. A computer system comprising:

a bus;

a communication device coupled with the bus,

a processor coupled with the bus;

a memory coupled with the bus, and

data stored in the memory that represent instructions that when executed cause a processor to:

generate and run executable code from an intermediate representation installed on the computer system;

collect profile data including collecting details of a hardware configuration of the computer system and sampling the running of the executable code at a controlled rate;

process the profile data when the processor is idle; and

recompile the intermediate representation based on the processed profile data, wherein recompiling comprises using annotations to relate locations in the executable code to the profile data and the intermediate representation, wherein each annotation includes a compiler optimization phase in which the annotation was created.

19. The computer system of claim 18 , wherein the data further comprises data representing instructions that when executed cause the processor to:

generate one or more profiles.

20. The computer system of claim 19 , wherein the data further comprises data representing instructions that when executed cause the processor to:

generate a binary level profile from analysis of the profile data; and

derive a profile at high level intermediate language from the binary level profile.

21. The computer system of claim 18 , wherein the data further comprises data representing instructions that when executed cause the processor to:

create an annotation.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 4, 2013
From: INTEL CORPORATION
To: MICRON TECHNOLOGY, INC.
Reel/Frame 030747/0001 →