Method for manufacturing a laterally diffused metal oxide semiconductor device
View Patent ↗A laterally diffused metal oxide semiconductor (LDMOS) device and a method of manufacture therefor. The method of manufacturing the LDMOS device includes forming an amorphous region in a semiconductor substrate between isolation structures and adjacent a gate structure, by implanting an amorphizing element, such as silicon or germanium, in the semiconductor substrate. The method further includes diffusing a channel dopant laterally in the amorphous region, to form a first portion of a channel.
1. A method of manufacturing a laterally diffused metal oxide semiconductor (LDMOS) device, comprising:
forming isolation structures and a gate structure;
forming an amorphous region in a semiconductor substrate between the isolation structures and adjacent the gate structure by implanting an amorphizing element in the semiconductor substrate; and
diffusing a channel dopant laterally in the amorphous region to form a first portion of a channel.
2. The method as recited in claim 1 wherein implanting an amorphizing element includes implanting silicon.
3. The method as recited in claim 2 wherein implanting silicon includes implanting silicon with an implant dose of at least about 1E15 atoms/cm 2 .
4. The method as recited in claim 1 wherein implanting an amorphizing element includes implanting germanium.
5. The method as recited in claim 4 wherein implanting germanium includes implanting germanium with an implant dose of at least about 1E14 atoms/cm 2 .
6. The method as recited in claim 1 wherein diffusing a channel dopant laterally in the amorphous region includes diffusing a first P-type source/drain dopant to a depth of about 100 nm, and implanting an amorphizing element includes implanting an amorphizing element to a depth ranging from about 180 nm to about 200 nm.
7. The method as recited in claim 1 wherein diffusing a channel dopant laterally in the amorphous region includes diffusing a channel dopant on a first side of the gate structure and further including diffusing a source/drain dopant laterally in the semiconductor substrate and on a second side of the gate structure.
8. The method as recited in claim 1 wherein diffusing a channel dopant includes diffusing a channel dopant at a temperature above about 600° C. that re-crystallizes the amorphous region.
9. The method as recited in claim 1 wherein diffusing a channel dopant includes diffusing a channel dopant having a gaussian distribution within the amorphous region.
10. The method as recited in claim 1 wherein forming an amorphous region includes forming an amorphous region using an energy ranging from about 50 KeV to about 150 KeV.
11. A method of manufacturing an integrated circuit, comprising:
fabricating laterally diffused metal oxide semiconductor (LDMOS) transistors, including:
forming isolation structures and a gate structure;
forming an amorphous region in a semiconductor substrate between the isolation structures and adjacent the gate structure by implanting an amorphizing element in the semiconductor substrate; and
diffusing a channel dopant laterally in the amorphous region to form a first portion of a channel;
depositing interlevel dielectric layers over the LDMOS transistors; and
creating interconnect structures in the interlevel dielectric layers that interconnect the LDMOS transistors to form an operative integrated circuit.
12. The method as recited in claim 11 wherein implanting an amorphizing element includes implanting silicon.
13. The method as recited in claim 12 wherein implanting silicon includes implanting silicon with an implant dose of at least about 1E15 atoms/cm 2 .
14. The method as recited in claim 11 wherein implanting an amorphizing element includes implanting germanium.
15. The method as recited in claim 14 wherein implanting germanium includes implanting germanium with an implant dose of at least about 1E14 atoms/cm 2 .
16. The method as recited in claim 11 wherein diffusing a channel dopant laterally in the amorphous region includes diffusing a first P-type dopant to a depth of about 100 nm, and implanting an amorphizing element includes implanting an amorphizing element to a depth ranging from about 180 nm to about 200 nm.
17. The method as recited in claim 11 wherein diffusing a channel dopant laterally in the amorphous region includes diffusing a channel dopant on a first side of the gate structure and further including diffusing a source/drain dopant laterally in the semiconductor substrate and on a second side of the gate structure.
18. The method as recited in claim 11 wherein diffusing a channel dopant includes diffusing a channel dopant at a temperature above about 600° C. that re-crystallizes the amorphous region.
19. The method as recited in claim 11 wherein diffusing a channel dopant includes diffusing a channel dopant having a gaussian distribution within the amorphous region.
20. The method as recited in claim 11 wherein forming an amorphous region includes forming an amorphous region using an energy ranging from about 50 KeV to about 150 KeV.