Semiconductor integrated circuit device and method of manufacturing the same
View Patent ↗Arrangements are provided to effectively prevent wire disconnection generated due to an increase of heat applied to a semiconductor integrated circuit device. The semiconductor integrated circuit device is structured such that a metal layer containing a Pd layer is provided in a portion to which a connecting member having a conductivity is connected, and an alloy layer having a melting point higher than that of an Sn—Pb eutectic solder and containing no Pb as a main composing metal is provided outside a portion molded by a resin. Further, a metal layer in which a thickness in a portion to which the connecting member having the conductivity is adhered is equal to or more than 10 μm is provided in the connecting member.
1. A semiconductor integrated circuit device comprising:
a conductive connecting member;
a connected member in which a metal layer including a palladium layer is provided at a first portion to which said connecting member is connected, and an alloy layer is provided having the melting point higher than that of a solder having Pb as a main composition metal, wherein said alloy layer contains no Pd as a main composing metal and substantially no Pb; and
resin molding said connected first portion,
wherein said alloy layer is provided at a second portion of said connected member outside of said resin.
2. A semiconductor integrated circuit device according to claim 1 , wherein said palladium layer is not provided at said second portion of the connected member outside of the resin.
3. A semiconductor integrated circuit device comprising:
a conductive connecting member;
a connected member in which a metal layer including a palladium layer is provided at a first portion to which said connecting member is connected, and a metal layer is provided having the melting point higher than that of an Sn—Pb eutectic solder, wherein said metal layer contains no Pd as a main composing metal and substantially no Pb; and
a resin molding said connected first portion,
wherein said metal layer is provided at a second portion of said connected member outside of said resin.
4. A semiconductor integrated circuit device according to claim 3 , wherein said palladium layer is not provided at said second portion of the connected member outside of the resin.
5. A semiconductor integrated circuit device comprising:
a conductive connecting member;
a connected member in which a metal layer including a palladium layer is provided at a first portion to which said connecting member is connected, and a Pb-free metal layer, having the melting point higher than Sn—Pb eutectic solder, wherein said Pb-free metal layer contains no Pd as a main composing metal; and
a resin molding said connected first portion,
wherein said Pb-free metal layer is provided at a second portion of said connected member outside of said resin.
6. A semiconductor integrated circuit device according to claim 5 , wherein said palladium layer is not provided at said second portion of the connected member outside of the resin.
7. A semiconductor integrated circuit device comprising:
a semiconductor chip;
a conductive connecting member connected to said semiconductor chip;
a connected member in which a metal layer including a palladium layer is provided at a first portion to which said connecting member is connected, and a Pb-free metal layer having the melting point higher than that of an Sn—Pb eutectic solder, wherein said Pb-free metal layer contains no Pd as a main composing metal, wherein said Pb-free metal layer is provided in a second portion of the connected member other than said first portion; and
a resin molding said semiconductor chip connected to said connecting portion, said connecting member and said first portion of said connected portion to which said connecting member is connected.
8. A semiconductor integrated circuit device according to claim 7 , wherein said palladium layer is not provided at said second portion of the connected member.
9. A semiconductor integrated circuit device comprising:
a semiconductor chip;
a wire bonded to said semiconductor chip;
a lead including an inner lead portion and an outer lead portion, wherein a metal layer including a palladium layer is plated on said inner lead portion and is bonded to said wire, and wherein a Pb-free alternate solder, having the melting point higher than that of an Sn—Pb eutectic solder, and which Pb-free alternate solder contains no Pd as a main composing metal, is plated on a mounted portion of said outer lead portion; and
a resin molding a bonding portion of said semiconductor chip to which said wire is bonded, said wire and the inner lead portion of said lead to which said wire is bonded.
10. A semiconductor integrated circuit device according to claim 9 , wherein said palladium layer is not provided at said outer lead portion of said lead.
11. A semiconductor integrated circuit device comprising:
a semiconductor chip;
a wire;
a resin molding said semiconductor chip and
said wire; and
a lead in which a metal layer including a palladium layer is provided in a front end portion of said lead molded by said resin, and a Pb-free metal layer, having the melting point higher than an Sn—Pb eutectic solder, which Pb-free metal layer contains no Pd as a main composing metal, is provided at an outer portion of said lead which is not molded by said resin.
12. A semiconductor integrated circuit device according to claim 11 , wherein said palladium layer is not provided at said second portion of the connected member.
13. A mounting substrate structure comprising:
a semiconductor integrated circuit device, said semiconductor integrated circuit device being provided with a conductive connecting member, a connected member in which a metal layer including a palladium layer is provided at a first portion to which said connecting member is connected, and an alloy containing no Pd as a main composing metal and substantially no Pb is provided in a second portion of said connected member, and a resin molding said first portion of said connected member to be connected; and
a printed circuit board,
wherein said semiconductor integrated circuit device is connected to said printed circuit board by a solder having the melting point higher than that of a solder having Pb as a main composing metal and
wherein said second portion of said connected member is outside of said resin.
14. A mounting substrate structure according to claim 13 , wherein said palladium layer is not provided at said second portion of the connected member outside of the resin.
15. A mounting substrate structure comprising:
a semiconductor integrated circuit device, said semiconductor integrated circuit device being provided with a conductive connecting member, a connected member in which a metal layer including a palladium layer is provided at a first portion to which said connecting member is connected, and a metal containing no Pd as a main composing metal and substantially no Pb at a second portion, and a resin molding said first portion of said connected member to be connected to said connecting member; and
a printed circuit board to which said semiconductor integrated circuit device is connected by a metal having the melting point higher than that of a solder having Pb as a main composing metal,
wherein said second portion of said connected member is outside of said resin.
16. A mounting substrate structure according to claim 10 , wherein said palladium layer is not provided at said second portion of the connected member outside of the resin.