Image rejection mixer

1. An image rejection mixer which comprises:

local input terminals supplied with local signals having a phase difference in order to distribute said local signals;

a first and a second signal mixer for mixing the distributed local signals and RF signals having phases different from those of said distributed local signals and for outputting respective IF current signals;

a first and a second phase shifter for generating a 90 degree phase difference between said respective IF current signals; and

a signal adder for adding the phase shifted respective IF current signals,

wherein image signals are removed from said respective RF signals, and

wherein said first and said second phase shifters comprise a lattice circuit consisting of inductors and resistors.

2. The image rejection mixer according to claim 1 , wherein said signal adder comprises a feedback loop, and adds said IF current signals.

3. The image rejection mixer according to claim 1 , wherein said feedback loop is a feedback loop of positive feedback.

4. The image rejection mixer according to claim 1 , wherein said signal adder comprises a differential amplifier.

5. The image rejection mixer according to claim 1 , which further comprises:

a first impedance between said first signal mixer and said first phase shifter; and

a second impedance between said second signal mixer and said second phase shifter.

6. The image rejection mixer according to claim 5 , wherein said impedances comprises a resistor, a capacitor, or an inductor or an arbitrary combination of them.

7. The image rejection mixer according to claim 6 , wherein values of said impedances are determined on the basis of a phase difference between said IF current signal outputted from said first signal mixer and said IF current signal outputted from said second signal mixer.

8. An image rejection mixer, comprising:

local input terminals which outputs LO signals having a phase difference;

a first and a second gilbert cell mixer, each gilbert cell mixer including:

a current source;

a pair of transistors, each transistor having a collector, base and emitter in which each emitter is connected to said current source through a resistor; and

two pairs of transistors having collectors, bases and emitters, in which two coupled emitters of each pair of said two pairs of transistors are connected to each collector of said pair of transistors, one of the collectors of one transistor in one pair of said two pairs of transistors is connected to one of the collectors of one transistor in the other pair of said two pairs of transistors, balanced RF signals are input into each base of each transistor of said pair of transistors, phase differenced balanced LO signals are input to the base of each transistor of each of said two pairs of transistors, and balanced IF current signals are output from each collector of each transistor of said two pairs of transistors;

a first and a second phase shifter including an LR lattice circuit in which said balanced IF current signals are input and phase shifted balanced IF current signals are output; and

a signal adder including two pairs of cascode transistors having collectors, bases and emitters in which each collector of one pair of cascode transistors is connected to the collectors of another pair of cascode transistors, and each of the emitters in each transistor of each pair of cascode transistors is connected to said first and second phase shifter.

9. An image rejection mixer, comprising:

local input terminals for outputting LO signals having a phase difference;

a first and a second gilbert cell mixer, each gilbert cell mixer including:

a current source;

a pair of transistors, each transistor having a collector, base and emitter in which each emitter is connected to said current source through a resistor; and

two pairs of transistors having collectors, bases and emitters, in which two pairs of transistors, balanced RF signals are input into each base of each transistor of said pair of transistors, phase differenced balanced LO signals are input to the base of each transistor of each of said two pairs of transistors, and balanced IF current signals are output from each collector of each transistor of said two pairs of transistors;

a first and a second phase shifter including a LR lattice circuit in which said balanced IF current signals are input and phase shifted balanced IF current signals are output; and

a signal adder including:

cascode transistors having collectors, bases and emitters;

a differential amplifier comprising:

a current source; and

a differential pair of transistors having collectors, bases and emitters, said emitters being coupled, and each base of each transistor of said differential pair of transistors is connected to said first and said second phase shifters, said coupled emitters of said differential pair of transistors are connected to said current source, and each collector of each transistor of said differential pair of transistors is connected to the bases of said cascode transistors; and

resistors located between the collectors of the differential pair of transistors and a voltage source.

10. A receiver including an image rejection mixer which comprises:

local input terminals for receiving RF frequency signals having a phase difference; and

an image rejection mixer including:

a signal distributor supplied with local signals having a phase difference in order to distribute said local signals;

a first and a second signal mixer for mixing the distributed local signals and said RF signals having phases different from those of said distributed local signals and for outputting respective IF current signals;

a first and a second phase shifter for generating a 90 degree phase difference between said respective IF current signals; and

a signal adder for adding the phase shifted respective IF current signals,

wherein image signals are removed by said image rejection mixer from said respective RF signals received by said signal receiver, and

wherein said first and said second phase shifters comprise a lattice circuit consisting of having inductors and resistors.