IP Library › Granted Patent US 6,861,334
Granted Patent B2
US 6,861,334 · App. 09/887,199 · Granted Mar 1, 2005

Method of fabricating trench isolation structures for integrated circuits using atomic layer deposition

Assignee: ASM International, N.V.
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Quick Facts
Patent No.
US 6,861,334
App. No.
09/887,199
Granted
Mar 1, 2005
Kind
B2
Abstract

A dielectric film is formed by atomic layer deposition to conformally fill a narrow, deep trench for device isolation. The method of the illustrated embodiments includes alternately pulsing vapor-phase reactants in a string of cycles, where each cycle deposits no more than about a monolayer of material, capable of completely filling high aspect ratio trenches. Additionally, the trench-fill material composition can be tailored by processes described herein, particularly to match the coefficient of thermal expansion (CTE) to that of the surrounding substrate within which the trench is formed. Mixed phases of mullite and silica have been found to meet the goals of device isolation and matched CTE. The described process includes mixing atomic layer deposition cycles of aluminum oxide and silicon oxide in ratios selected to achieve the desired composition of the isolation material, namely on the order of 30% alumina and 70% silicon oxide by weight.

Claims (53)

1. A method of fabricating trench isolation structures between integrated electrical devices in a semiconductor substrate, comprising:

placing a semiconductor substrate in a reaction chamber, the semiconductor substrate comprising trenches: and

completely filling the trenches with insulating material by atomic layer deposition to form a trench isolation structure, the atomic layer deposition process comprising a plurality of primary cycles, each primary cycle comprising, in sequence:

introducing a first vapor-phase reactant to the substrate, thereby forming no more than about one monolayer of a first reactant species conforming at least to surfaces of the trenches;

removing excess first vapor-phase reactant and byproduct from the reaction chamber;

introducing a second vapor-phase reactant to the substrate, thereby reacting with the first reactant species conforming at least to the surfaces of the trenches; and

removing excess second vapor-phase reactant and byproduct from the reaction chamber

filling the trenches further comprises a plurality of secondary cycles, each secondary cycle comprising, in sequence:

introducing a third vapor-phase reactant to the substrate, thereby forming no more than about one monolayer of a third reactant species conforming at least to surfaces of the trenches, the third reactant species being different from the first reactant species;

removing excess third vapor-phase reactant and byproduct from the reaction chamber;

introducing a fourth vapor-phase reactant to the substrate, thereby reacting with the third reactant species conforming at least to the surfaces of the trenches; and

removing excess fourth vapor-phase reactant and byproduct from the reaction chamber

wherein the primary cycles deposit a first oxide species and the secondary cycles deposit a second oxide species, wherein the primary and secondary cycles are mixed in a ratio to match a coefficient of thermal expansion (CTE) of the insulating material to within about 20% of a CTE of the semiconductor substrate.

2. The method of claim 1 , wherein the primary and secondary cycles are mixed in a ratio to match a coefficient of thermal expansion (CTE) of the insulating material to within about 10% of a CTE of the semiconductor substrate.

3. A method of fabricating trench isolation structures between integrated electrical devices in a semiconductor substrate, comprising:

placing a semiconductor substrate in a reaction chamber, the semiconductor substrate comprising trenches; and

completely filling the trenches with insulating material by atomic layer deposition to form a trench isolation structure, the atomic layer deposition process comprising a plurality of primary cycles, each primary cycle comprising, in sequence:

introducing a first vapor-phase reactant to the substrate, thereby forming no more than about one monolayer of a first reactant species conforming at least to surfaces of the trenches;

removing excess first vapor-phase reactant and byproduct from the reaction chamber,

introducing a second vapor-phase reactant to the substrate, thereby reacting with the first reactant species conforming at least to the surfaces of the trenches; and

removing excess second vapor-phase reactant and byproduct from the reaction chamber,

wherein filling the trenches further comprises a plurality of secondary cycles, each secondary cycle comprising, in sequence:

introducing a third vapor-phase reactant to the substrate, thereby forming no more than about one monolayer of a third reactant species conforming at least to surfaces of the trenches, the third reactant species being different from the first reactant species;

removing excess third vapor-phase reactant and byproduct from the reaction chamber;

introducing a fourth vapor-phase reactant to the substrate, thereby reacting with the third reactant species conforming at least to the surfaces of the trenches; and

removing excess fourth vapor-phase reactant and byproduct from the reaction chamber,

wherein the primary cycles deposit silicon oxide and the secondary cycles deposit aluminum oxide and filling the trench comprises depositing aluminum oxide to form the insulating material comprising silicon oxide and between about 23% and 37% aluminum oxide by weight.

4. A method of fabricating trench isolation structures between integrated electrical devices in a semiconductor substrate, comprising:

placing a semiconductor substrate in a reaction chamber, the semiconductor substrate comprising trenches; and

completely filling the trenches with insulating material by atomic layer deposition to form a trench isolation structure, the atomic layer deposition process comprising a plurality of primary cycles, each primary cycle comprising, in sequence:

introducing a first vapor-phase reactant to the substrate, thereby forming no more than about one monolayer of a first reactant species conforming at least to surfaces of the trenches;

removing excess first vapor-phase reactant and byproduct from the reaction chamber;

introducing a second vapor-phase reactant to the substrate, thereby reacting with the first reactant species conforming at least to the surfaces of the trenches; and

removing excess second vapor-phase reactant and byproduct from the reaction chamber,

wherein filling the trenches further comprises a plurality of secondary cycles, each secondary cycle comprising, in sequence:

introducing a third vapor-phase reactant to the substrate, thereby forming no more than about one monolayer of a third reactant species conforming at least to surfaces of the trenches, the third reactant species being different from the first reactant species;

removing excess third vapor-phase reactant and byproduct from the reaction chamber;

introducing a fourth vapor-phase reactant to the substrate, thereby reacting with the third reactant species conforming at least to the surfaces of the trenches; and

removing excess fourth vapor-phase reactant and byproduct from the reaction chamber,

wherein the primary cycles deposit silicon oxide and the secondary cycles deposit aluminum oxide and filling the trench comprises depositing aluminum oxide to form the insulating material comprising silicon oxide and between about 26% and 34% aluminum oxide by weight.

5. A method of fabricating trench isolation structures between integrated electrical devices in a semiconductor substrate, comprising:

placing a semiconductor substrate in a reaction chamber, the semiconductor substrate comprising trenches; and

completely filling the trenches with insulating material by atomic layer deposition to form a trench isolation structure, the atomic layer deposition process comprising a plurality of primary cycles, each primary cycle comprising, in sequence:

introducing a first vapor-phase reactant to the substrate, thereby forming no more than about one monolayer of a first reactant species conforming at least to surfaces of the trenches;

removing excess first vapor-phase reactant and byproduct from the reaction chamber;

introducing a second vapor-phase reactant to the substrate, thereby reacting with the first reactant species conforming at least to the surfaces of the trenches; and

removing excess second vapor-phase reactant and byproduct from the reaction chamber

filling the trenches further comprises a plurality of secondary cycles, each secondary cycle comprising, in sequence:

introducing a third vapor-phase reactant to the substrate, thereby forming no more than about one monolayer of a third reactant species conforming at least to surfaces of the trenches, the third reactant species being different from the first reactant species;

removing excess third vapor-phase reactant and byproduct from the reaction chamber;

introducing a fourth vapor-phase reactant to the substrate, thereby reacting with the third reactant species conforming at least to the surfaces of the trenches; and

removing excess fourth vapor-phase reactant and byproduct from the reaction chamber

wherein the primary cycles deposit a first oxide species and the secondary cycles deposit a second oxide species, at least a portion of the first and second oxide species combine to form a separate phase in equilibrium with a portion of the first oxide, and the separate chase comprises mullite, the first oxide comprises silicon oxide and the second oxide comprises aluminum oxide, wherein the insulating material comprises between about 25% mullite and 50% mullite by weight.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 23, 2003
From: ASM MICROCHEMISTRY OY
To: ASM INTERNATIONAL N.V.
Reel/Frame 014852/0964 →
CORRECTIVE ASSIGNMENT TO CORRECT THE LAST NAME OF THE THIRD INVENTOR, GRANNEMAN, PREVIOUSLY RECORDED ON REEL 012229 FRAME 0894, ASSIGNOR CONFIRMS THE ASSIGNMENT OF THE ENTIRE INTEREST. Recorded Jan 22, 2002
From: RAAIJMAKERS, IVO; SOININEN, PEKKA T.; GRANNEMAN, ERNST H.A.
To: ASM MICROCHEMISTRY OY
Reel/Frame 012472/0873 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 12, 2001
From: RAAIJMAKERS, IVO; SOININEN, PEKKA T.; GRANNE\MAN, ERNST H.A.
To: ASM MICROCHEMISTRY OY
Reel/Frame 012229/0894 →
Continuity (1)
Related Publication 20030015764A1 · Jan 23, 2003