Granted Patent
Utility
US 6,399,453
· Confirmation No. 2572
PROCESS OF MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE HAVING AN AMORPHOUS SILICON GATE
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⬇ PDF
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2001-06-27 | TRNA |
Transmittal of New Application | 3 | View | |
| 2001-06-27 | SPEC |
Specification | 41 | View | |
| 2001-06-27 | CLM |
Claims | 14 | View | |
| 2001-06-27 | ABST |
Abstract | 1 | View | |
| 2001-06-27 | DRW |
Drawings-only black and white line drawings | 26 | View | |
| 2001-06-27 | OATH |
Oath or Declaration filed | 4 | View |
Inventors
Attorneys & Agents of Record
Classification
USPC
438/305
H10D84/85
H10D64/01312
H10B12/05
H10B12/09
H10D84/038
H10D84/0177
Prosecution
- Examiner
- TSAI, HUI JEY
- Art Unit
- 2812
- Customer No.
- 20457
- Docket No.
- 501.40152X00
- Confirmation No.
- 2572
Foreign Priority
2000-192013
·
2000-06-27
·
JAPAN
Publication
- Pub. No.
- US20010054725A1
- Pub. Date
- 2001-12-27
Patent Term Adjustment
0days
No related applications found.
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2018-08-21
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2001-06-27
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Quick Facts
- Patent No.
- US 6,399,453
- App. No.
- 09/891,381
- Filed
- 2001-06-27
- Granted
- 2002-06-04
- Pub. No.
- US20010054725A1
- Examiner
- TSAI, HUI JEY
- Art Unit
- 2812
- PTA
- 0 days
External Links