IP Library Granted Patent US 6,861,720
Granted Patent B1
US 6,861,720 · App. 09/943,068 · Granted Mar 1, 2005

Placement template and method for placing optical dies

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Quick Facts
Patent No.
US 6,861,720
App. No.
09/943,068
Granted
Mar 1, 2005
Kind
B1
Abstract

A placement template and method for placing optical dies provides an alternative to large-die implementation for microelectromechanical systems (MEMS). Multiple dies are aligned by a template mounted on the substrate. Apertures in the template receive the dies and protrusions at the edges of the apertures guide the dies during mounting. The protrusions may be tapered having a narrow end farthest from the substrate to provide self-alignment of the dies as they are placed. The template may be epitaxially grown from a semiconductor material on either the substrate or a backing layer. The template may also be etched, stamped or otherwise formed from a metal or ceramic layer. A separate template may be bonded to a ceramic or other substrate by an eutectoid bond, providing carefully controlled template placement on the substrate.

Claims (51)

1. An optical integrated circuit, comprising:

a substrate;

a plurality of dies; and

an etched metal template layer attached to a top of the substrate for aligning the dies by contacting the dies during placement of the dies on the template layer and the substrate, the template layer having a plurality of apertures for receiving the dies, self-alignment features for guiding the dies during placement, and having walls substantially perpendicular to a surface of the substrate for contacting sides of the dies after placement, whereby said dies are precisely located with respect to each other along a the surface of the substrate.

2. The optical integrated circuit of claim 1 , wherein the optical integrated circuit is a mirror array and the dies are mirror sub-arrays.

3. The optical integrated circuit of claim 1 , wherein the apertures are rectangular apertures for accepting the plurality of dies.

4. The optical integrated circuit of claim 1 , wherein the template layer has protrusions perpendicular to the mounting surface of the substrate for guiding the dies during placement.

5. The optical integrated circuit of claim 4 , wherein the protrusions are tapered, having a narrow end farthest from the substrate, so that the dies may self-align as the dies are guided toward the substrate.

6. The optical integrated circuit of claim 5 , wherein the template layer has rectangular apertures for accepting the plurality of dies, and wherein walls of the rectangular apertures are formed by the protrusions.

7. The optical integrated circuit of claim 1 , further comprising an adhesive layer for attaching the dies to the substrate, and wherein the adhesive layer is cut to provide vents to permit the escape of gas during mounting of the dies.

8. The optical integrated circuit of claim 1 , wherein the substrate has perforations for permitting the escape of gas during mounting of the dies.

9. The optical integrated circuit of claim 1 , wherein the template layer is bonded to the substrate by an eutectoid layer.

10. An optical integrated circuit, comprising:

a substrate;

a plurality of mirror sub-arrays;

means attached to a top layer of the substrate for aligning the plurality of mirror sub-arrays during placement of the plurality of mirror sub-arrays; and

means for retaining the mirror sub-arrays in precise alignment with respect to each other after placement, and wherein the retaining means and the aligning means are provided in an etched metal layer.

11. An optical integrated circuit, comprising:

a substrate;

a plurality of dies; and

a stamped metal template layer attached to a top of the substrate for aligning the dies by contacting the dies during placement of the dies on the template layer and the substrate, the template layer having a plurality of apertures for receiving the dies, self-alignment features for guiding the dies during placement, and having walls substantially perpendicular to a surface of the substrate for contacting sides of the dies after placement, whereby said dies are precisely located with respect to each other along a the surface of the substrate.

12. The optical integrated circuit of claim 11 , wherein the optical integrated circuit is a mirror array and the dies are mirror sub-arrays.

13. The optical integrated circuit of claim 11 , wherein the apertures are rectangular apertures for accepting the plurality of dies.

14. The optical integrated circuit of claim 11 , wherein the template layer has protrusions perpendicular to the mounting surface of the substrate for guiding the dies during placement.

15. The optical integrated circuit of claim 14 , wherein the protrusions are tapered, having a narrow end farthest from the substrate, so that the dies may self-align as the dies are guided toward the substrate.

16. The optical integrated circuit of claim 15 , wherein the template layer has rectangular apertures for accepting the plurality of dies, and wherein walls of the rectangular apertures are formed by the protrusions.

17. The optical integrated circuit of claim 11 , further comprising an adhesive layer for attaching the dies to the substrate, and wherein the adhesive layer is cut to provide vents to permit the escape of gas during mounting of the dies.

18. The optical integrated circuit of claim 11 , wherein the substrate has perforations for permitting the escape of gas during mounting of the dies.

19. The optical integrated circuit of claim 11 , wherein the template layer is bonded to the substrate by an eutectoid layer.

20. An optical integrated circuit, comprising:

a substrate;

a plurality of dies; and

an epitaxially grown semiconductor template layer attached to a top of the substrate for aligning the dies by contacting the dies during placement of the dies on the template layer and the substrate, the template layer having a plurality of apertures for receiving the dies, self-alignment features for guiding the dies during placement, and having walls substantially perpendicular to a surface of the substrate for contacting sides of the dies after placement, whereby said dies are precisely located with respect to each other along a the surface of the substrate.

21. The optical integrated circuit of claim 20 , wherein the optical integrated circuit is a mirror array and the dies are mirror sub-arrays.

22. The optical integrated circuit of claim 20 , wherein the apertures are rectangular apertures for accepting the plurality of dies.

23. The optical integrated circuit of claim 20 , wherein the template layer has protrusions perpendicular to the mounting surface of the substrate for guiding the dies during placement.

24. The optical integrated circuit of claim 23 , wherein the protrusions are tapered, having a narrow end farthest from the substrate, so that the dies may self-align as the dies are guided toward the substrate.

25. The optical integrated circuit of claim 24 , wherein the template layer has rectangular apertures for accepting the plurality of dies, and wherein walls of the rectangular apertures are formed by the protrusions.

26. The optical integrated circuit of claim 20 , further comprising an adhesive layer for attaching the dies to the substrate, and wherein the adhesive layer is cut to provide vents to permit the escape of gas during mounting of the dies.

27. The optical integrated circuit of claim 20 , wherein the substrate has perforations for permitting the escape of gas during mounting of the dies.

28. The optical integrated circuit of claim 20 , wherein the template layer is bonded to the substrate by an eutectoid layer.

29. An optical integrated circuit, comprising:

a substrate;

a plurality of mirror sub-arrays;

means attached to a top layer of the substrate for aligning the plurality of mirror sub-arrays during placement of the plurality of mirror sub-arrays; and

means for retaining the mirror sub-arrays in precise alignment with respect to each other after placement, and wherein the retaining means and the aligning means are provided in a stamped metal layer.

30. An optical integrated circuit, comprising:

a substrate;

a plurality of mirror sub-arrays;

means attached to a top layer of the substrate for aligning the plurality of mirror sub-arrays during placement of the plurality of mirror sub-arrays; and

means for retaining the mirror sub-arrays in precise alignment with respect to each other after placement, and wherein the retaining means and the aligning means are provided in an epitaxially grown semiconductor layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 9, 2020
From: AMKOR TECHNOLOGY, INC.
To: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE.LTD.
Reel/Frame 054067/0135 →
SECURITY INTEREST Recorded Aug 1, 2018
From: AMKOR TECHNOLOGY, INC.
To: BANK OF AMERICA, N.A., AS AGENT
Reel/Frame 046683/0139 →