IP Library › Granted Patent US 6,476,633
Granted Patent Utility
US 6,476,633 · Confirmation No. 7259

SEMICONDUCTOR INTEGRATED CIRCUIT AND TESTING METHOD THEREOF

Inventor: Koichi Yokomizo
Patented Case View Patent ↗ View Publication ↗
⬇ PDF
 Code Description Pages PDF
2001-09-06 TRNA Transmittal of New Application 4 View
2001-09-06 A.PE Preliminary Amendment 4 View
2001-09-06 SPEC Specification 39 View
2001-09-06 CLM Claims 4 View
2001-09-06 ABST Abstract 1 View
2001-09-06 DRW Drawings-only black and white line drawings 9 View
2001-09-06 OATH Oath or Declaration filed 3 View
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Quick Facts
Patent No.
US 6,476,633
App. No.
09/946,514
Filed
2001-09-06
Granted
2002-11-05
Pub. No.
US20020005732A1
Art Unit
2858
PTA
0 days