Granted Patent
Utility
US 6,686,108
· Confirmation No. 2293
FABRICATION METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
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⬇ PDF
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2004-01-30 | IDS |
Information Disclosure Statement (IDS) Form (SB08) | 3 | View | |
| 2004-01-30 | FOR |
Foreign Reference | 7 | View | |
| 2003-12-15 | IFEE |
Issue Fee Payment (PTO-85B) | 1 | View | |
| 2001-09-28 | TRNA |
Transmittal of New Application | 4 | View | |
| 2001-09-28 | SPEC |
Specification | 52 | View | |
| 2001-09-28 | CLM |
Claims | 8 | View | |
| 2001-09-28 | ABST |
Abstract | 1 | View | |
| 2001-09-28 | DRW |
Drawings-only black and white line drawings | 25 | View |
Inventors
Attorneys & Agents of Record
Classification
USPC
430/30
H10P76/00
G03F1/32
G03F1/36
G03F7/70125
Y10S430/146
Prosecution
- Examiner
- YOUNG, CHRISTOPHER G
- Art Unit
- 1756
- Customer No.
- 20457
- Docket No.
- 501.40716X00
- Confirmation No.
- 2293
Foreign Priority
2000-313513
·
2000-10-13
·
JAPAN
Publication
- Pub. No.
- US20020045134A1
- Pub. Date
- 2002-04-18
Patent Term Adjustment
0days
CHANGE OF ADDRESS
Recorded 2017-11-29
from
HITACHI, LTD.
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2003-09-26
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2002-01-02
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Quick Facts
- Patent No.
- US 6,686,108
- App. No.
- 09/964,341
- Filed
- 2001-09-28
- Granted
- 2004-02-03
- Pub. No.
- US20020045134A1
- Examiner
- YOUNG, CHRISTOPHER G
- Art Unit
- 1756
- PTA
- 0 days
External Links