IP Library Granted Patent US 6,961,834
Granted Patent B2
US 6,961,834 · App. 09/977,510 · Granted Nov 1, 2005

Method and apparatus for scheduling of requests to dynamic random access memory device

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Quick Facts
Patent No.
US 6,961,834
App. No.
09/977,510
Granted
Nov 1, 2005
Kind
B2
Abstract

The present invention provides for the scheduling of requests to one resource from a plurality of initiator devices. In one embodiment, scheduling of requests within threads and scheduling of initiator device access is performed wherein requests are only reordered between threads.

Claims (31)

1. A process for scheduling requests to access a resource, said requests originating from at least one thread from at least one initiator, said process comprising combining scheduling of requests between threads and scheduling of requests of initiator access to the resource and processing at least one of, read and write, requests within each thread in the order that they are issued.

2. The process as set forth in claim 1 , wherein combining comprises using a combination of thread quality of service (QOS) scheduling and resource scheduling.

3. The process as set forth in claim 2 , wherein combining further comprises:

determining an order of requests to meet QOS guarantees;

determining an order of requests for resource efficiency; and

if the resource efficiency order satisfies QOS guarantees, and intra-thread order is maintained, scheduling a request according to a first resource efficiency order, else scheduling a request in accordance with a second resource efficiency order.

4. The process as set forth in claim 1 , further comprising maintaining and using a thread scheduling history to at least in part to determine scheduling of threads.

5. The process as set forth in claim 4 , wherein thread scheduling history comprises thread bandwidth usage.

6. The process as set forth in claim 1 , further comprising maintaining a state and access history on the device to at least in part determine scheduling of the resource.

7. The process as set forth in claim 1 , wherein scheduling is determined by prioritizing threads according to bandwidth usage and sequencing requests from different threads so as to achieve a determined device performance.

8. The process as set forth in claim 1 , wherein scheduling is selected from the group consisting of absolute and cost-function scheduling.

9. The process as set forth in claim 1 , wherein the resource is a dynamic random access memory (DRAM) and scheduling is selected from the group consisting of deciding when to close dynamic random access page (DRAM) and open another, and deciding when to switch DRAM requests to use a different physical bank of DRAM, and deciding when to switch direction of a bus coupled to the DRAM.

10. A scheduling apparatus for scheduling access to a resource, comprising:

an input coupled to receive at least one access request originating from at least one thread from at least one initiator;

logic to combine scheduling of requests between threads and scheduling of initiator access to the resource and processing requests within each thread in the order that they are issued.

11. The scheduling apparatus as set forth in claim 10 , wherein the resource is selected from the group consisting of a process, apparatus and a dynamic random access memory (DRAM).

12. The scheduling apparatus as set forth in claim 10 , wherein the logic utilizes a combination of thread quality of service (QOS) guarantees and resource cost-function scheduling.

13. The scheduling apparatus as set forth in claim 10 , further comprising a thread scheduling history, said logic using the thread history to at least in part determine scheduling.

14. The scheduling apparatus as set forth in claim 13 , wherein the thread scheduling history comprises thread bandwidth usage.

15. The scheduling apparatus as set forth in claim 10 , further comprising a state and access history used to at least in part determine scheduling of the resource.

16. The scheduling apparatus as set forth in claim 10 , wherein scheduling of threads from at least one initiator is selected from the group consisting of absolute and cost function scheduling.

17. The scheduling apparatus as set forth in claim 10 , wherein the resource is dynamic random access memory (DRAM) and a cost function scheduling is selected from the group consisting of deciding when to close a DRAM page and open another, deciding when to switch DRAM requests to use a different physical bank of DRAM, and deciding when to switch direction of a bus coupled to the DRAM.

18. An apparatus, comprising:

means for scheduling requests to access a resource, wherein the requests originate from at least one thread of at least one initiator;

means for combining scheduling of requests between threads; and

means for scheduling of requests of initiator access to the resource and processing requests within each thread in the order that they are issued.

19. The apparatus of claim 18 , further comprising:

means for determining an order of requests to meet QOS guarantees;

means for determining an order of requests for resource efficiency, wherein if the resource efficiency order satisfies QOS guarantees, and intra-thread order is maintained, then scheduling a request according to a first resource efficiency order, otherwise scheduling a request in accordance with a second resource efficiency order.

20. The apparatus of claim 18 , further comprising:

means for deciding when to switch DRAM requests to use a different physical bank of DRAM.

Assignments (7)
CHANGE OF NAME Recorded Aug 30, 2022
From: FACEBOOK TECHNOLOGIES, LLC
To: META PLATFORMS TECHNOLOGIES, LLC
Reel/Frame 061356/0166 →
MERGER AND CHANGE OF NAME Recorded Jun 9, 2019
From: SONICS, INC.; FACEBOOK TECHNOLOGIES, LLC
To: FACEBOOK TECHNOLOGIES, LLC
Reel/Frame 049442/0332 →
RELEASE OF SECURITY INTEREST Recorded Jun 4, 2015
From: PARTNERS FOR GROWTH, L.P.
To: SONICS, INC.
Reel/Frame 035790/0758 →
RELEASE Recorded Dec 20, 2005
From: SILICON VALLEY BANK
To: SONICS INC
Reel/Frame 017366/0509 →
SECURITY AGREEMENT Recorded May 26, 2005
From: SONICS, INC.
To: PARTNERS FOR GROWTH, L.P.
Reel/Frame 016069/0063 →
SECURITY INTEREST Recorded Mar 9, 2004
From: SONICS, INC.
To: SILICON VALLEY BANK
Reel/Frame 015056/0313 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 17, 2001
From: WEBER, WOLF-DIETRICH
To: SONICS, INC.
Reel/Frame 012272/0084 →